Part Number: TMS320F28069
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Sachin,
SYSCLKOUT = (OSCCLK * PLLCR[DIV] / PLLSTS[DIVSEL])
Where SYSCLKOUT = operating frequency of the device, OSCCCLK = frequency of the i/p clock to the device, PLLCR[DIV] = PLL multiplier value & PLLSTS[DIVSEL] = clock divider at the o/p of the PLL.
On a different note, it appears you attempted to type the complete description of your problem in the "subject" field itself. So, there is no description of the problem in the body of the post. Please let me know if my answer did not address your concern.