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Original question:

TMS320F280049: cJTAG 2 pin schematic

TMS320F280049C: Defect TCK pin

Chris van der Aar
Intellectual 570 points

Part Number: TMS320F280049C

We produced 63 boards with the TMS320F280049C where 1 board could not be programmed with the XDS110 programmer after production so we have replaced the processor and I have to check if it will be Ok now. However a second board had the same issue at our software development team (it was working and programmed) but this version has a bootloader and the processor is still working so we are able to load new software by the bootloader. But when we connect the XDS110 we get an error message Error connecting to the target:(Error -2131 @ 0x0). We also tried with a  Blackhawk programmer and the programmer on the T.I. Launch development kit and with a 2 wirfe instead of 4 wire protocol but all with the same results.

We use the same interface with a 14p header as described in your datasheet. The TCK pin has no pull up or pull down and is directly connected to the processor. When I measure the impedance at the defect board between TCK and GND I measure around 2 Ohms (not 0 Ohms) but at a good board I measure around 300kOhm so it looks like the TCK pin is internally shorted to GND.

Do you know how this could happen? When someone would place the XDS110 (or sometimes we use the programmer of the F280049x Launch board) 180 degrees rotated it is possible that the TCK makes short-circuit to GND (or connected to antother JTAG pin when the connector is put one row shifted) but I would expect that this should be not a problem. Furthermore we only have +3V3 levels so it is not possible that a higher voltage is connected to the TCK pin. The only reason of the internal short of the TCK pin we are thinking about is damage by ESD or the fact that the programmer is connected while the system is powered on but normally this is not a problem and we have never seen this until now (and we already use the T.I. DSPs for a long time).

See picture below for our programming circuit  we implemented on our board (we use 2 headers in parallel so it can be accessed from 2 sides. This has more a practical reason when it is built in our machine).

  • 0
    TI__Guru* 82770 points

    Chris,

    Thanks for contacting us here on the E2E forum.  I agree with your assesment that it appears there has been some damage to the TCK pin that it is now shorted to VSS.  Also agree that I doubt it is from any intentional connection; even if the JTAG was flipped TCK would now just be grounded.  Since TCK is also required for 2 pin cJTAG, that explains why that didn't help things.

    You mentioned ESD damage, given that this signal is routed to a connector this could indeed be more prone to see the discharge events that cause this kind of damage.  Can you comment if when the PCB is being handled/plugged into that there is best practice(either for operator or machine) to avoid charge build up?

    SInce you have routed this header to top and bottom of the PCB is there any chance there is ever contention on this pin, from two connections happening simultaneously?  

    Best,
    Matthew