I am not sure if the maximum clock speed for the F28069 CLA is 80MHz or 90MHz. The data sheet says 90MHz, but I ran across a few references in the technical reference manual that show various timings when the clock speed is 80MHz, but I am assuming those are example frequencies. However, there is nothing I can find in the data sheet that states the CLA must be limited to 80MHz.
I did find a reference in the C2000 Migration path document (sprabj2) that states the CLA is limited to 80MHz. If this is real, why can't I find anything in the actual data sheet that supports this claim?
The following link shows an 80MHz limit (at the very bottom of the page), but nothing to back it up.
https://processors.wiki.ti.com/index.php/Control_Law_Accelerator_(C2000_CLA)_FAQ
Can anyone clarify this for me??
Thanks,
Dale