TMS320F2812: How to recover from XREADY functioning failure

GZeev

Part Number: TMS320F2812

Dear sir/madam,

In my application I use TMS320F2812 and FPGA.

The FPGA is connected to TMS320F2812 through its external memory interface (XINTF). That is, the TMS320F2812 'sees ' memory.

Since the FPGA is slower than the FPGA, we use the XREADY signal to avoid getting wrong data from external memory.

Lately we had a situation that the FPGA has been stopped functioning. As a result the XREADY signal stayed in status 'Not ready' and the TMS320F2812 stuck in waiting for external memory data.

My questions:

1. If I will activate the watchdog mechanism of TMS320F2812, will it reset the TMS320F2812 on this situation?

2. Will the internal interrupts work properly on this situation, assuming the external memory read occurs not inside an interrupt?

Best regards and have a happy new year !!!

Zeev

over 6 years ago

0 Srinivasa Chakravarthy over 6 years ago

TI__Intellectual 1360 points

Due to holidays, you can expect a response by first week of January.

0 Vivek Singh over 6 years ago in reply to Srinivasa Chakravarthy

TI__Guru** 117051 points

Hi,

1. If I will activate the watchdog mechanism of TMS320F2812, will it reset the TMS320F2812 on this situation?

WD reset will reset the DSP but not FPGA (unless it's common reset signal) so it will depend on how FPGA logic has been written. If FPGA pulls the ready low when access is terminated by XINTF then it should be ok.

2. Will the internal interrupts work properly on this situation, assuming the external memory read occurs not inside an interrupt?

If CPU access is stall by XREAD then interrupt will not work. CPU has to finish the current access before jumping to interrupt handler.

Regards,

Vivek Singh

0 GZeev over 6 years ago in reply to Vivek Singh

Intellectual 270 points

Hi Vivek Singh,

Thanks for answering me before first week of January.

If FPGA will not pull the ready low when access is terminated by XINTF then the internal WD reset will not work?

Best Regards and have a happy new year !!!

Zeev

0 Vivek Singh over 6 years ago in reply to GZeev

TI__Guru** 117051 points

Hi,

If FPGA will not pull the ready low when access is terminated by XINTF then the internal WD reset will not work?

If FPGA is not de-activating the READY signal then when next access is given by XINTF, it'll again stuck. WD will reset the device and it'll start working again but FPGA also need to be reset to make XINTF access work as expected.

Regards,

Vivek Singh

0 GZeev over 6 years ago in reply to Vivek Singh

Intellectual 270 points

Hi,

Thank you for your fast and clear answer.

Have an excellent decade!!!

Zeev

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TMS320F2812: How to recover from XREADY functioning failure