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TMS320F28377D: SPEED COMPARISON TEST PLEASE

Part Number: TMS320F28377D


Hi Guys, *** HAPPY NEW YEAR ***

I've set up my PLL in assembler to 200Mhz and sending raw data to PORTA to measure the toggle speed. See my code below.

The toggling speed I'm measuring on my scope is 1.15Mhz. This has to be wrong, specially if the CPU is running at 200Mhz. 

Can somebody set their F28377D to 200Mhz and measure the toggling speed of PORTA with a scope and please please please let me know what speed you get.

This is absolutely doing my head in. My control card is very old so I'm thinking my card maybe faulty. 

Please test and let me know what speed you get.

Thanks guys and hope to hear from you soon.

Peter

;--------------------------------
; SPEED TEST ON PORT A
			EALLOW
			MOVL XAR7,#GPADIR		; SET PORTA DIRECTION TO OUTPUT
			MOVL XAR6,#GPADAT		; XAR6 = PORTA DATA OUT REGISTER
			MOVW AL,#65535
			MOVW AH,#65535
			MOVL *XAR7,ACC
			EDIS

TEST_LOOP:
			MOVW AR2,#65535			;16BITS
			MOVW *XAR6,AR2
			MOVW AR3,#0					; 0 BITS
			MOVW *XAR6,AR3
			BF TEST_LOOP,UNC
;-------------------------------

 

  • I would have expected you would see a little faster toggling than that too. Can you share your PLL configuration? Are you writing your own or are you using our InitSysCtrl or InitSysPll functions?

    You may also want to try using XCLKOUT to check the SYSCLK rate.

    Whitney

  • Hi Whitney, thank you for your reply. I'm getting desperate getting my PLL to 200Mhz and my PORTS data rate above 1.15Mhz. At the moment I don't have much hair left. LOL. :)

    I'm using the F28377D control card with Docking station ver R4.1 which is very old. I purchased these 2 from TI years ago. I checked the docking stations PDF and there is no XCLKOUT pin accessible so I can't test the CPU clock speed.

    I'm not a C programmer therefore I'm setting the PLL in assembler. My code is below. If my code is wrong can you please supply me with a working assembler PLL setup for 200Mhz. Other people here have tested their F28377D at 200Mhz and their PORTA data rate is 18.5Mhz so it seems that my PLL is not setting up properly or my control card is faulty.

    Here's my PLL setup code:

    ; SET SYSTEM CLOCK
    			EALLOW									; ALLOW PROTECTED REGISTERS TO BE ACCESSED.
    			MOVL XAR7,#CLKSRCCTL1	;CLKSRCCTL1 = 0
    			MOVW AL,#0							; 0 INTERNAL CLOCK INTOSC2
    			MOVW AH,#0
    			MOVL *XAR7,ACC
    			
    			LC __DELAY_SHORT				; DELAY FOR PLL
    
    			MOVL XAR7,#SYSPLLMULT	;SYSPLLMULT
    			MOVW ACC,#40					;10 * 40 / 2 = 200Mhz 
    			MOVL *XAR7,ACC
    
    			MOVL XAR7,#SYSCLKDIVSEL
    			MOVW ACC,#1						; / 2
    			MOVL *XAR7,ACC
    
    			MOVL XAR7,#SYSPLLCTL1	; ENABLE NEW CLOCK
    			MOVW ACC,#3						; 3
    			MOVL *XAR7,ACC
    			
    			LC __DELAY_SHORT
    			LC __DELAY_SHORT
    			LC __DELAY_SHORT
    
    ; PLL LOCK BIT IS LOCKED. VERIFIED.

    Thanks again Whitney and waiting for your reply.

    Peter

  • You can configure the pin muxing for GPIO73 to XCLKOUT. GPIO73 should be accessible on the docking station.

    We don't have an existing assembly function for configuring the PLL currently. The "System Clock Setup" section in the device Technical Reference Manual goes into the steps for initializing the PLL, so you could write your own based on that. The values you're writing to the registers look good for 200MHz, but not following the recommended order of steps could be causing your problem.

    Are you using the CCS Registers view to debug your code? Are you checking the clock configuration registers to make sure they are being updated as expected? Do you see the SYSPLLMULT getting cleared at any point?

    Whitney

  • Hi Whitney, Thanks for the info.

    I have a 1024x600 LCD connected to my F28377D and I've written code to read the PLL registers and print the value to the LCD.

    This works fine. I haven't checked if the SYSPLLMULT is changing after it's set because the PLL LOCK bit is set. I'll checked it now and let you know.

    Peter

  • Hi Whitney, I've setup the XCLKOUT pin73 on my F28377D and the INTOSC1 and INTOSC2 is clocking at 9.22Mhz on my scope.

    I set CLKSRCCTL3 to 0 (PLLSYSCLK) and my scope read 0. I guess my PLL setup is wrong.

    Can you give me a step by step line by line in C to correctly setup the PLL and I will translate it to Assembler.

    If my PLL is not running then why does my F28377D run faster when I raise the PLL multiplier? Strange.

    Peter

  • *** UPDATE ***

    Hi Whitney, PLL is working now. 

    I setup the XCLKOUT via mux and the PLLCLK now reads 200Mhz. Multiplier is set to 43 / 2 on my system.

    I ran the scope on my PORTA toggle assembly program and now it reads 4.9Mhz. Other people on the forum have reached 25Mhz on their PORTA?

    Could there be a fault with my F28377D card?

    Please let me know.

    Thanks Whitney

    Peter.

  • Glad you have the system clock running at 200MHz now. Is your code running from RAM or flash? If it's in flash, the flash wait states could be causing the code to execute slower than it would in RAM. If it's not already in RAM, can you try moving it there?

    I don't suspect any issue with your board currently.

    Whitney