CCS/TMS320F28377D: SYNCHRONIZATION HAPPEN BUT TWO PWM NOT MATCH BY EXTSYNCIN1

Hi,

vishal sapara said:

I Am Not able To understand Why Two PWM are not match Exactly to each other ???...

What is the phase configuration you are using? What is the pulse used for Sync output generation in DSP-1 and what is the TBPHS configuration in DSP-2?
These setting could be adding offset.

vishal sapara said:

Why Both the Rising and Falling edge of Two DSP boards is not exactly matching???

If the synchronization is configured correctly and working - there may still be few cycle difference between the edges due to the delay involved in Sync pulse generation, synchronization of the input in DSP-2 etc. But that can be adjusted with TBPHS.

vishal sapara said:

Why falling of Yellow one is match with Rising of Blue one ????.

I cant think of a specific reason for this. To make sure that the synchronization is indeed occurring - you can tun off the PHSEN in DSP-2, observe the outputs and then enable PHSEN. This you get the PWM output in sync.

Thank you very much for reply..

What is the phase configuration you are using? What is the pulse used for Sync output generation in DSP-1 and what is the TBPHS configuration in DSP-2?

i am Generating EPWM from DSP-1 and using this PWM (EPWM4A) for Synch in  and Connecting This to GPIO-32  in DSP-2  & rout through INPUTXBAR-5 to EXTSYNCIN1 in DSP-2  for EPWM1A synchin purpose.. and Enabling TBPHS phase loading so EXTSYNCIN1 event Occurs.... below is my PWM configuration  ..

i am using same pwm Configuration in both DSP....

EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
EPwm1Regs.TBPRD = EPWM1_TBPRD ; // Set timer period
EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Disable phase loading
EPwm1Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm1Regs.TBCTR = 0x0000; // Clear counter
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

// Setup shadow register load on ZERO
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

// Set Compare values
EPwm1Regs.CMPA.bit.CMPA = 0; // Set compare A value HALF OF TBPRD
EPwm1Regs.CMPB.bit.CMPB = 0; // Set Compare B value HALD OF TBPRD

// Set actions

EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Set PWM1A on event A, up count
EPwm1Regs.AQCTLA.bit.CAD = AQ_SET; // Clear PWM1A on event A, down count
EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR; // Set PWM1B on event B, up count
EPwm1Regs.AQCTLB.bit.CBD = AQ_SET; // Clear PWM1B on event B, down count

// Deadband setup
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; //both RED and FED active
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; //Active high complementary (AHC). EPWM7B is inverted.
EPwm1Regs.DBCTL.bit.IN_MODE = DBA_RED_DBB_FED; //EPwm1A is the source for both FED and RED
EPwm1Regs.DBRED = EPWM_DEADBAND; // 2us deadband delay on rising edge
EPwm1Regs.DBFED = EPWM_DEADBAND; // 2us deadband delay on falling edge

I cant think of a specific reason for this. To make sure that the synchronization is indeed occurring - you can tun off the PHSEN in DSP-2, observe the outputs and then enable PHSEN. This you get the PWM output in sync.

i have seen on scope  when i am not using SYNC signal for other DSP-2 ...

blue One pulse in SCOPE its look like its running means its rolling ....when i am connecting SYNC signal ...Blue one become steady With respect to  Yellow one it is now not rolling that means its syncing with Yellow.....

If the synchronization is configured correctly and working - there may still be few cycle difference between the edges due to the delay involved in Sync pulse generation, synchronization of the input in DSP-2 etc. But that can be adjusted with TBPHS.

i have made one change in my software so Now i am able to synch two PWM exactly to each other ....earlier i was using 50% duty cycle for  PWM(EPWM4A) which is used for SYNC in Purpose ...Now i am using 1% duty cycle  for  PWM(EPWM4A) which is used for SYNC in Purpose..

my question is what is effect of pulse ON TIME on synch  in event???........ 

EPWM Frequency is 3khz.......and PWM which is used for sync purpose has also 3khz switching frequency.......EPWM clock is 100MHz which is half of internal PLL clock which is 200MHz..