• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 82 subscribers
  • Views 379 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F280049C: Technical typo & SDK lab1 DRV8320RS nFault input

Genatco
Guru 56408 points

Part Number: TMS320F280049C

Try to report document feed back after 3 times received access denied for sending text << >> then system error html tags. Who knew why or even web page thought ASCII text box <<>> was considered html?

Anyway there seems to be a missing word NOT technical PDF page 884. Otherwise the statement makes no sense to me without the word Not being added.

8.4.1 No Synchronization (Asynchronous Input)
This mode is used for peripherals where input synchronization is not required or the peripheral itself performs the synchronization. Examples include communication ports McBSP, SCI, SPI, and I2C. In addition, it may be desirable to have the ePWM trip zone (TZn) signals function independent of the presence of SYSCLKOUT. The asynchronous option is not valid if the pin is used as a general purpose digital input pin (GPIO). If the pin is configured as a GPIO input and the asynchronous option is NOT selected then the qualification defaults to synchronization to SYSCLKOUT as described in Section 8.4.2. NOTE: Using input synchronization when the peripheral itself performs the synchronization may cause unexpected results. The user should ensure that the GPIO pin is configured for asynchronous in this case.

Perhaps typo effects SDK lab1 DRV8320RS (SPI Slave) nFault pin being configured GPIO input to SYSCLKOUT. Should the GPIO input be configured asynchronous for the external device? Seemingly the Master SPI and ePWM has no why to know when nFault may assert TZ2. If it should what might be the syntax to make GPIO asynchronous input.

Thanks

  • 0
    TI__Guru 52220 points

    So the TRM should be correct:

    This is saying that if you want to use a pin as GPIO INPUT, and you have selected ASYNC option, it is going to sync with SYSCLK. You want to use the GPIO input in your software, so it syncs to SYSCLK.

    If using SPI, the peripheral will Sync it self so at the GPIO level you must select ASYNC.

    Example:

    //
    // GPIO17 is the SPISOMIA.
    //
    GPIO_setMasterCore(17, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_17_SPISOMIA);
    GPIO_setPadConfig(17, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(17, GPIO_QUAL_ASYNC);

    //
    // GPIO16 is the SPISIMOA clock pin.
    //
    GPIO_setMasterCore(16, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_16_SPISIMOA);
    GPIO_setPadConfig(16, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(16, GPIO_QUAL_ASYNC);

    //
    // GPIO19 is the SPISTEA.
    //
    GPIO_setMasterCore(19, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_19_SPISTEA);
    GPIO_setPadConfig(19, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(19, GPIO_QUAL_ASYNC);

    //
    // GPIO18 is the SPICLKA.
    //
    GPIO_setMasterCore(18, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_18_SPICLKA);
    GPIO_setPadConfig(18, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(18, GPIO_QUAL_ASYNC);

  • 0 in reply to Nima Eskandari
    Guru 56408 points

    >> The asynchronous option is not valid if the pin is used as a general purpose digital input pin (GPIO).

    I was thinking TZn are not digital general purpose when asynchronous external SIO device delivers the signal to target MCU.

    >> In addition, it may be desirable to have the ePWM trip zone (TZn) signals function independent of the presence of SYSCLKOUT. 

    This is a misleading statement since the TZn GPIO is a digital input is it not? How can we make TZn desirable Async when that is not possible to begin with?

    So GPIO input Xbar TZ2 into ePWM is synchronous for the SIO nFault input signal when it is desirable for it to be an asynchronous input?

  • 0 in reply to Genatco
    Guru 56408 points

    The JP1/2/5/6 SPIA/B GPIO pins in (hal.c) default synchronous, so I added the GPIO Async qualifier option you show above.

    That is why the word NO should be added since all GPIO inputs (default) to Synchronous mode with SYSCLK. It stands to reason the DRV8320RS SDK should be updated with this fix as there have been posts leading to this issue.

        // GPIO16->SPIA-SDI for J1/J2 connection
    GPIO_setMasterCore(16, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_16_SPISIMOA);
    GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
    GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
    GPIO_setQualificationMode(16, GPIO_QUAL_ASYNC);

    // GPIO17->SPIA-SDO for J1/J2 connection
    GPIO_setMasterCore(17, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_17_SPISOMIA);
    GPIO_setDirectionMode(17, GPIO_DIR_MODE_IN);
    GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
    GPIO_setQualificationMode(17, GPIO_QUAL_ASYNC);

    // GPIO40->nFAULT for J1/J2 connection
    GPIO_setMasterCore(40, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_40_GPIO40);
    GPIO_setDirectionMode(40, GPIO_DIR_MODE_IN);
    GPIO_setPadConfig(40, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(40, GPIO_QUAL_ASYNC);