Part Number: TMS320F280049C
There does not seem to be any code written SDK InstaSpin FOC (hal.c) pre-charge boot strap caps via future DC inverter 1/2 bridge connections made to F820049c EVM. Not being exactly familiar with 49c ePWM and we like to test our custom 3 phase DC inverter with SVPWM and test signal chain (FOC is-04) to verify use. It would seem the BoostXL-DRV8320 handles charge pump boot cycles without being commanded via target. It might be good alternative to switch any DC inverter between modulations shown below order to verify customer objective.
The DRV-8320 show both Qg, our DC inverter can be >50vdc but why was 1/2 bridge pre-charge code omitted? Is 1/2 bridge Cboot pre-charge code included in FOC control suite (hal.c)? We have excellent Cboot charge code written for ARM Cortex MCU but seemingly an unknown Cboot strap sequence for 49c MCU class. The DRV-3820RS 50v will limit our SPM to a very low speed only confirm if SVPWM works.
Charge pump info DRV8320RS:
9.2.1.2.1.1 Example
If a system with a VVM voltage of 8 V (IVCP = 15 mA) uses a maximum PWM switching frequency of 45 kHz, then the charge pump can support MOSFETs using trapezoidal commutation with a Qg less than 333 nC, and MOSFETs using sinusoidal commutation with a Qg less than 111 nC.
8.3.1.3 Gate Driver Voltage Supplies
The voltage supply for the high-side gate driver is created using a doubler charge pump that operates from the VM voltage supply input. The charge pump lets the gate driver correctly bias the high-side MOSFET gate with respect to the source across a wide input supply voltage range. The charge pump is regulated to keep a fixed output voltage of VVM + 11 V and supports an average output current of 25 mA. When VVM is less than 12 V, the charge pump operates in full doubler mode and generates VVCP = 2 × VVM – 1.5 V when unloaded. The charge pump is continuously monitored for undervoltage events to prevent under-driven MOSFET conditions. The charge pump requires a X5R or X7R, 1-μF, 16-V ceramic capacitor between the VM and VCP pins to act as the storage capacitor. Additionally, a X5R or X7R, 47-nF, VM-rated ceramic capacitor is required between the CPH and CPL pins to act as the flying capacitor.