TMS320F28075: issue of not be able to enter ADC interrupt

Strong ZHANG

Part Number: TMS320F28075

Hi Team,

My customer face an issue that in their application code sometimes cannot enter ADC interrupt. here are the details of the issue:

The ADC is trigger per 42us, and then go to ADC interrupt after finish ADC sample. in their main code, there will have a while(1) function that enable global interrupt for 3ms and disable interrupt for 6ms, so in these 6ms that disable global, there will not have ADC interrupt. but in the period of during 3ms, there will have ADC interrupt,

in the interrupt there will have code to clear the interrupt flag.

at the beginning everything is ok, but when run the code for several seconds, the code will never enter ADC interrupt again, both the ADC sample and the code run in the main function are both ok, and we see from the ccs window that the ADC interrupt flag was not clear. if clear the ADC interrupt by manual in ccs window, then ADC interrupt can be accessed for several seconds , but after these several seconds then will never enter ADC interrupt again.

we use GPIO toggle to see exactly what happen and if any conflict. as below show yellow waveform show the time to enable the interrupt. green show if ADC interrupt happen. in normal case at the beginning the waveform is below:

then we capture the waveform when start to have issue as below:

we also capture the previous waveform of the issue happen below:

we guess there are two interrupt request almost at the same time when issue occur although in normal case the interrupt is trigger per 42us. when first interrupt occur, and enter the interrupt service code, there will have code to clear the interrupt flag. but at the same time the second interrupt occur and this interrupt flag was not clear, then the code will never enter the interrupt service code again.

in order to verify this, we add one line code in the interrupt to clear the interrupt flag as below showed, so there are two line code to clear the interrupt flag twice,

it works and the issue is fixed.

question is what we guess is true and any principle to explain the phenomenon above? any suggestion for the case that need to disable and reenable global interrupt in the while(1) function?

over 5 years ago

0 Vasudha Bhadoria over 5 years ago

TI__Genius 10845 points

Hi,

I think this issue is seen because another ADC interrupt is generated when the execution is still in ISR and the flag is cleared at the starting of the ISR only. The ADC flag gets set again when the execution is still in the ISR and hence further interrupts are not recieved since the flag is not cleared. You can confirm this by checking the ADCINTOVF register as well.

In order to recieve further interrupts, the ADC interrupt flag clear and PIE acknowledge should be placed at the end of the ISR code. Try putting the EPWM specific code shown above and any other custom application specific code before ADCINTFLGCLR statement and check if the issue is resolved.

Thanks

Vasudha

0 Strong ZHANG over 5 years ago in reply to Vasudha Bhadoria

TI__Expert 4400 points

Hi Vasudha,

Thanks for your reply, customer put the ADC interrupt flag clear and PIE acknowledge at the end of the ISR code, still have this issue, only that clear the ADC interrupt flag twice in the interrupt can solve this problem.

0 MatthewPate over 5 years ago in reply to Strong ZHANG

TI__Guru* 80080 points

Strong,

I agree with Vasudha on the potential root cause of this issue. I would suggest customer to enable the INTxCONT bit in the ADCINTSEL#n# register that corresponds to the ADCINT in question. This will allow the INTs to continue to propogate to the PIE block even if the INT#FLG is not cleared in time.

Customer can then use the ADCSOCOVF1 register to see if there has been an INT issued before the customer has a chance to clear the flag. Even though this may be occuring it would prevent the condition where no more ADC INTs get generated, which as you and customer have noted puts the system in an unstable state.

Let us know if the above gets past the main issue, and we can help debug more if we need to understand why we are not clearing the INT in time.

Best,

Matthew

0 Strong ZHANG over 5 years ago in reply to MatthewPate

TI__Expert 4400 points

Hi Matthew,

Thanks for your input, From the waveform that I post, yes it seem ture the root cause is because another ADC interrupt is generated when the execution is still in ISR and the flag is cleared at the starting of the ISR only.

but this cannot explain why customer use ADCINTFLGCLR to clear flag twice as below that can resolve this issue? both of the clearing flag code was done at the beginning of the ISR, and there still have big possibility that another ADC interrupt is generated when the execution is still in ISR.

and customer clear the flag at the end of ISR did not resolve this issue.

customer care more about the root cause than how to fix this issue, any other interrupt mechanism or principle to explain this issue?

0 Vasudha Bhadoria over 5 years ago in reply to Strong ZHANG

TI__Genius 10845 points

Hi,

I think this issue is due to interrupt overflow only. In case of interrrupt overflow condition follwing sequence should be used in ISR to recieve further interrupts.

//
// adca1_isr - Read ADC Buffer in ISR
//
interrupt void adca1_isr(void)
{
    AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT0;
    if(RESULTS_BUFFER_SIZE <= resultsIndex)
    {
        resultsIndex = 0;
        bufferFull = 1;
    }

    AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag

    //
    // Check if overflow has occurred
    //
    if(1 == AdcaRegs.ADCINTOVF.bit.ADCINT1)
    {
        AdcaRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; //clear INT1 overflow flag
        AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
    }

    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}

Refer to below e2e post for more details. Refer to the Errata document as well posted in the below post.

https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/814884?tisearch=e2e-sitesearch&keymatch=ADC%20interrupt%20overflow

I think this is the reason why the customer code works, since it clears the int flag two times.

Thanks

Vasudha

C2000™︎ microcontrollers

C2000 microcontrollers forum

TMS320F28075: issue of not be able to enter ADC interrupt