Hi,
If I use the SPLL_1PH_NOTCH library (or any other SPLL implementation from DigitalPower SDK), is there a way to know if the SPLL has locked/synchronized or not?
JHi
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Hi,
If I use the SPLL_1PH_NOTCH library (or any other SPLL implementation from DigitalPower SDK), is there a way to know if the SPLL has locked/synchronized or not?
JHi
And a follow question:
Shouldn't the fo (Output frequency of PLL(Hz)) be stable when locked/synchronized? At the moment it is changing between 20 and 90, but if I use the sine part to toggle a pin (when it changes the sign) it is synchronized to my sine produced with waveform generator.
JHi
Jhi,
We did not add a filter to the output of the frequency from the PLL and hence you see the f0 jump around, that is the PLL action happening, The jumps will be commensurate to noise in the system as seen by the PLL.
You can put a low pass filter on it and observe the value.
regards
Manish Bhardwaj