Hello,
I have a project that uses SPI and I am in the process of migrating it to CPU2.
My program requires manual and automatic operation of the SPI enable bit.
GPIO_66_SPISTEB in this case, Previously my project would have it running automatic, but for bulk reads over the size of the fifo buffer I have manually been setting it.
However in CPU2 the pin no longer goes low, I assume this line is not functioning correctly on CPU2
I call this before setting it low for long read/writes
GPIO_setPinConfig(GPIO_66_GPIO66);
GPIO_writePin(66, 0);
And then set it back to
GPIO_setPinConfig(GPIO_66_SPISTEB);
My question is should this work on CPU2? I followed the examples and use this to pass control.
SysCtl_selectCPUForPeripheral(SYSCTL_CPUSEL6_SPI, 2, SYSCTL_CPUSEL_CPU2);
GPIO_setMasterCore(66, GPIO_CORE_CPU2);
Also is there a better way to control the enable pin other than through setting a GPIO?
Any help would be appreciated.
Cheers