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TMS320F28379D: Access to the peripherals

Ralf Bartling
Expert 1135 points
Part Number: TMS320F28379D

Hello,
I have a question regarding the access from cpu1 and cpu2 to the peripherals.

Is it possible to access to the peripherals (i.e. ePWM module, ADC module) with both cpu´s during runtime?

What is the meaning of the CPUSELx registers? Are these register only responsible for the clock of the peripherals or determine those registers also the ownership of the peripherals?


Thank you very much
Ralf

  • 0
    TI__Guru 61235 points

    Hello Ralf,

    CPUSELx bits control ownership of the peripheral.  See the TRM SPRUHM8I, section 5.3.2.  If the peripheral is not owned by the CPU subsystem then that CPU cannot access the peripheral for reads or writes (reads return 0, writes are ignored).  You cannot access a peripheral with both CPUs at the same time.  An exception to this are the ADC result registers, which are accessible to both CPUs regardless of ownership.

    Regards,

    David

  • 0
    TI__Guru** 115271 points

    Also please refer "Table 6-10. Bus Master Peripheral Access" in device datasheet to know the accessibility of different peripherals from CPU1 and CPU2 subsystem.

    Regards,

    Vivek Singh