Part Number: TMS320F28379D
Hi,
I use an eCap1 module to measure period of square-wave signal.
The eCap module is setup in single-shot mode to capture events:
CEVT1: rising edge and do not reset counter,
CEVT2: rising edge and do not reset counter,
CEVT3: rising edge and do not reset counter,
When I use a PWM signal from TMS320F28379D as a source of square-wave signal, everything works correct and absolutelly exactly.
However, when I connect the eCap1 input pin to signal generator (RIGOL DG1062), a problem occurs. Everything works fine a few minutes a then period measurement fails. It even stops setting the CEVT3 flag (and it stops entering to the ISR), while the input signal is still present. The content of the eCap1 registers for the above problem is shown in the following figure.
Do you have any idea, where the problem is? Thank you for your answers.
Init code for eCap1 is below:
ECap1Regs.ECCTL2.bit.TSCTRSTOP = 0; // Stop the TSCTR counter
ECap1Regs.ECEINT.all = 0; // Disable eCAP1 interrupts
ECap1Regs.ECCLR.all = 0x00FF; // Clear eCAP1 interrupt flags
ECap1Regs.CTRPHS = 0;
ECap1Regs.ECCTL2.bit.CAP_APWM = 0; // ECAP module operates in capture mode
ECap1Regs.ECCTL2.bit.SYNCI_EN = 0; // disable counter (TSCTR) to be loaded from CTRPHS
ECap1Regs.ECCTL2.bit.SWSYNC = 1;
ECap1Regs.ECCTL2.bit.STOP_WRAP = 2; // for continuous mode wrap value 2; wrap after Capture Event 3
ECap1Regs.ECCTL2.bit.SYNCO_SEL = 0; // Select sync-in event to be the sync-out signal (pass through)
ECap1Regs.ECCTL2.bit.CONT_ONESHT = 1; // Operate in One-Shot mode
ECap1Regs.ECCTL1.bit.PRESCALE = 0; // Divide by 1 (i.e,. no prescale, by-pass the event prescaler)
ECap1Regs.ECCTL1.bit.CAPLDEN = 1; // Enable CAP1-4 register loads at capture event time.
ECap1Regs.ECCTL1.bit.CAP1POL = 0; // Capture Event 1 triggered on a rising edge (RE)
ECap1Regs.ECCTL1.bit.CAP2POL = 0; // Capture Event 2 triggered on a rising edge (RE)
ECap1Regs.ECCTL1.bit.CAP3POL = 0; // Capture Event 3 triggered on a rising edge (RE)
ECap1Regs.ECCTL1.bit.CAP4POL = 0; // Capture Event 4 triggered on a rising edge (RE)
ECap1Regs.ECCTL1.bit.CTRRST1 = 0; // Reset counter after Capture Event 1 time-stamp has been captured
ECap1Regs.ECCTL1.bit.CTRRST2 = 0; // Do not reset counter on Capture Event 2
ECap1Regs.ECCTL1.bit.CTRRST3 = 0; // Do not reset counter on Capture Event 3
ECap1Regs.ECCTL1.bit.CTRRST4 = 0; // Do not reset counter on Capture Event 4
ECap1Regs.ECEINT.bit.CEVT3 = 1; // CEVT3 Interrupt enable
ECap1Regs.ECEINT.bit.CTROVF = 1; // CTROVF Interrupt enable
ECap1Regs.ECCTL2.bit.SYNCI_EN = 1; // enable counter (TSCTR) to be loaded from CTRPHS
ECap1Regs.ECCTL2.bit.TSCTRSTOP = 1; // Start the TSCTR counter
Regards,
Jozef
