TMS320F280049: CLA debug how to: Increasing or decresing irrelavent code will cause malfunction

Hi expert,

Add additional information of malfunction customer meet in cold start:

One of the three task seems not running, others are normal. Abnormal task is driven by ADCINT1 and originated from EPWM2's EOC. (If they switched from EPMW2 to EPWM1, this issue will be solved). Before stoped, task can run normally for s short time period.

Thanks

Sheldon

Sheldon,

It sounds like a very strange problem.  I don't know why simply switching between EPWM2 and EPWM1 would make a difference. 

Are both PWMs running at the same frequency? 

When the task stops running, check the registers.  For example, is it flagged, but not running?  

-Lori

Hi Lori,

We made some progress here. I asked them to toggle GPIO in ADCINT's ISR (this ADCINT is also the one to trigger a CLA task). During our test, we found toggled GPIO signle will stop after sometime running (they have other not nested ISR here taking long processing time), I guess here could be a ADCINT overflow situation so let them to change ADCINTSEL register to make the interrupt in contineous mode, after that, GPIO toggle in ISR becomes normal, at least not missing or stoppong. 

But we have further questions here. I will summarize here later.

Thanks

Sheldon

Hi Lori,

Continue on this...

My customer used to use ADCINT1 to trigger an ISR and a CLA task. They configure ADC interrupt in "non-contineous" mode and in this case ISR and CLA task will stop entering when running for some time. Then, they moved ADC interrupt to "contineous" mode to bring ADC ISR back to normal, but the CLA task still not triggering as normal. We know there may be some interrupt over flow in "non-contineous" mode, but we can't not figure how does this influence the CLA task execution.

Could you help me on this?

Thanks

Sheldon

Sheldon He said:

Then, they moved ADC interrupt to "contineous" mode to bring ADC ISR back to normal, but the CLA task still not triggering as normal. We know there may be some interrupt over flow in "non-contineous" mode, but we can't not figure how does this influence the CLA task execution.

If the CLA task is running when another interrupt for the same task comes in, it will be flagged.  When the task completes, then the highest priority CLA task will get fired.  This could be the task that was running or another task.  If a second interrupt comes in for the same task, then it will be lost.  There is only one flag.  I don't see how the task would be completely stalled unless a higher priority task is keeping it from running.

When the task stops running, what are the registers telling about the state of the CLA?  For example, is the task flagged? Is another higher priority task running? 

The CLA has access to the ADC registers on this device.  The CLA itself could clear the ADC interrupt flag instead of putting the ADC in continuous mode. 

Regards

Lori

Hi Lori,

I know your point, thanks!

Just a quick question here, if MIOVF is flagged for some CLA task, and this register/register bit is not cleared, will it stop the specific CLA task from being triggered again?

Thanks

Sheldon