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TMS320F28379D: ADC configuration

Part Number: TMS320F28379D


Hi,

In SPRT720 – February 2016 Figure 1 p 2, I have noticed that a Data Bus Bridge (connected to CPU & CLA) is present for the 16/12 bit ADC Configuration.

Is it possible to have some details about this Data Bus Bridge? Is an arbitration access mechanism present ?

 

Best regards

C. VALPARD

  • Hi Christian,

    The document you want to use to dive deeper into these topics is the TRM for F2837xD family devices: http://www.ti.com/lit/ug/spruhm8i/spruhm8i.pdf

    In particular, have a look at the sections "Common Peripheral Architecture" and "CPU and CLA Arbitration" in the DMA chapter.  This describes the arbitration when all the masters potentially have access.

    For the bridge in question, check out "CLA and CPU Arbitration" in the CLA chapter, since the bridge to the ADC control registers only has CPU and CLA access, not DMA.  

  • Hi, Devin,

    Thank you for your fast answer. But in §5.6 (CPU and CLA Arbitration) I have found

    • Peripheral frame 1: ePWM, eCAP, eQEP, SDFM, CMPSS, DAC
    • Peripheral frame 2: PMBus and SPI

    I have not found ADC... :-(

    Best regards

    Christian Valpard

  • Hi Christian,

    The peripheral frame is relevant to peripherals which have CLA/DMA as secondary masters. For ADC config , it is only CPU and CLA access hence no peripheral frame. As Devin mentioned, please refer the CPU/CLA arbitration section (section "6.4 CLA and CPU Arbitration") in device user guide to know the detail about arbitration scheme. Hope this helps.

    Also please note there is no PMBus on this device. Not sure in which document you find the mention of PMBus for "Peripheral frame 2".

    Regards,

    Vivek Singh

  • Hi Vivek,

    OK , I did not read the good §...

    "§6.4 CLA and CPU Arbitration" is OK

    Thank you very much :-)

    Best regards

    Christian VALPARD