Other Parts Discussed in Thread: MOTORWARE
It would seem a critical error was made in how the motor SDK (FOC) performs zero offset calibration. According to TRM 13.13.1 Pg.1498 the 512 conversion results are to be divided by a multiple of 16, not 512. This may account for ePWM fault trips randomly occurring when motor ID offset calibration and ABRUPTLY transitions from any previous time wait into next time wait.
Also note another mistake to subtract (adcOffsetMean) from 96 when 112 was specified in the TRM.
1. Why has FE chosen to disqualify the TRM specification for ADC channel offset calibration in the SDK code snip below?
2. Why would we divide the results by 512 when that is to be the number of converted samples acquired?
13.13.1 ADC Zero Offset Calibration
Use the following procedure to re-calibrate the ADC offset in 12-bit, single-ended mode:
1. Set ADCOFFTRIM to +112 steps (0x70). This adds an artificial offset to account for negative offset that
may reside in the ADC core.
2. Perform some multiple of 16 conversions on VREFLO (internal connection), accumulating the results
(for example, 32*16 conversions = 512 conversions).
3. Divide the accumulated result by the multiple of 16 (for example, for 512 conversions, divide by 32).
4. Set ADCOFFTRIM to 112 – result from step 3.
adcOffsetMean = 0; adcSum = 0; index = 0; sampleSize = 512;
//Calculate average ADC sample value adcOffsetMean = adcSum / sampleSize; // delay to allow ADCs to power up SysCtl_delay(100U); EALLOW; HWREGH(base + ADC_O_OFFTRIM) = 96 - adcOffsetMean; EDIS;