LAUNCHXL-F280049C: Shared Memory Data Integrity CLA and C28x

Markus Hein

Hello,

I am new to the TI Piccolo Microcontrollers and I have a question about Data integrity in the Shared Memory between Control Law Accellerator and C28X Core.

Is there a way to ensure that one Core doesnt write to the same Data Section while the other Core Reads date from the Data Section.

Thanks to you

Markus

over 6 years ago

0 Vivek Singh over 6 years ago

TI__Guru** 116421 points

HI,

Is there a way to ensure that one Core doesnt write to the same Data Section while the other Core Reads date from the Data Section.

These are single port RAMs and hardware has arbitration logic to make sure only one access goes to RAM block. So data integrity is taken care by hardware.

Regards,

Vivek Singh

0 Markus Hein over 6 years ago in reply to Vivek Singh

Prodigy 20 points

Thank you for your reply.

I guess you refer to section 3.11.1.5 of the Technical Reference Manual. Ist that right?

Thanks

Markus

0 Vivek Singh over 6 years ago in reply to Markus Hein

TI__Guru** 116421 points

Hi Markus,

I guess you refer to section 3.11.1.5 of the Technical Reference Manual. Ist that right?

That is correct.

Regards,

Vivek Singh

C2000™︎ microcontrollers

C2000 microcontrollers forum

LAUNCHXL-F280049C: Shared Memory Data Integrity CLA and C28x