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TMS320F280049: Looking for ADC ENOB vs Sample rate for F280049

Aaron Chen
Prodigy 290 points

Part Number: TMS320F280049

Hi Team,

We are promoting F280049 to customer. Would you provide the curve for the ADC ENOB vs Sample rate ?

Though they are need simultaneous ADC with ENOB 13 bits, I am trying to push and possible to compromise with 12 bit ADC.

The input signal is Sin/Cos wave with 80KHz.

Aaron

  • 0
    TI__Guru 60865 points

    Hi Aaron,

    There is no inherent relationship between ENOB and sample rate.  

    There is a relationship between ENOB and input signal bandwidth.  As the bandwidth of the input signal increases, SNR will start to decrease at some point due to aperture jitter in the ADC S+H.  You can see that we specify SNR at 100kHz for this device; if the input signal is faster than this SNR will start to degrade.

    Assuming the ADC has more sample bandwidth than what you need, you can oversample the inputs to increase the resolution (but not the accuracy).  This is not automatic; the customer will need to use processing resources to collect and average the additional samples. See the following e2e thread for a discussion of achievable ENOB gain via oversampling:

    https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/815285/3017272#3017272  

  • 0 in reply to Devin Cottier
    TI__Prodigy 290 points

    Devin,

    Thanks for the informative feedback. To move forward, do you have example code for the additional sampling for higher ENOB? We are trying to push the device in customer. BTW, Can it be done by CLB to release the bandwith of processing.  What we are trying to do is to "lower customer inventing cost" so as to move from competitor to our device.

    If you have anything , please share with me. aaron.chen@ti.com

  • 0 in reply to Aaron Chen
    TI__Guru 60865 points

    Hi Aaron,

    Oversampling can just be triggering multiple samples and then averaging them together.  However, really you usually don't even do the division part of the average (to retain all the bits) so it just involves summing the samples.  

    The method to collect and sum the samples will need to vary based on degree of oversampling needed.  For 4-16 samples, you can possibly just use redundant SOCs to sample.  There is a blurb in the TRM about this:

      

    Oversampling with a higher N becomes a little more involved; you'll need to use the DMA to accumulate the samples or take an ISR every 8-16 samples.   You also may need an additional trigger source like an ePWM running N times faster than the main ePWM.