Hello team,
my customer is considering using the CLB to implement a Dead Band compensation circuitry currently done with external FPGA. Do we have an app note showing how to develop this type of solution using the CLB?
Regards,
Raul Matos
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Hello team,
my customer is considering using the CLB to implement a Dead Band compensation circuitry currently done with external FPGA. Do we have an app note showing how to develop this type of solution using the CLB?
Regards,
Raul Matos
We don't have an app note specifically for this but we have an app note on how to migrate from CPLD or FPGA to the CLB.
http://www.ti.com/lit/an/spraco2/spraco2.pdf
We also have an app note on how to implement a design from scratch in the CLB. Your customer should be able to implement this with the CLB capability and remove the FPGA requirement.
http://www.ti.com/lit/an/spracl3/spracl3.pdf
Nima