CCS/TMS320F28379D: Issue with External interrupt input2 and PWM interrupt

Hi,

I'm assuming that XINT2 is working when PWM is disabled. If so, it means that all the XINT2 related settings etc. are corect.
In that case, Your PWM interrupt may be running at very high frequency and consuming all the available CPU MIPS.
So, you can slow down the PWM interrupt frequency and check. This will free up some bandwidth for XINT.

Hi Subrahmanya,

Good day!

Actually I will tell you scenario. I have TMS320F28379D dual core board which is designed for my application. In that application I am using, 40 IOS, 12 PWM modules, ADCs, XINT, SCIA and SCID, CPUTimer,IPC, SPIA.

In this case my SPI is interface with PIC controller for TCP MODBUS communication with external world. I have used XINT2 from the PIC controller. Whenever data is receive from PIC over SPI XINT2 generated to inform TMS320. In this case all the modules working together perfectly without PWM interrupt enable.

When I enable the pwm interrupt TCP MODBUS communication stop. In this case I have checked that SPIA clock is working. My MODBUS application stop working and it is dependent on the SPI and XINT2. 

Actually, I dont have actual board to check all the functionality as I am working from home due to lock down. I have TI control card to test. In such case if you any suggestion Please share.

My PWM frequency is 100KHz and I have even tried with single PWM module as well but result was same.

Regards,

Dnyanesh

Hello,

In the above issue there are three peripheral are interrupted like PWM interrupt, SPI interrupt and XINT2. In this 3 peripheral most dominant is PWM interrupt.

I think if I can change the priority of interrupt. Please can tell me how we can assign the interrupt priority of peripheral.

I am using driverlib library. above issue is happening with using driverlib. Please suggest where I can check.

Regards,

Dnyanesh

Hello,

Can anyone provide me solution or suggestion on this ?

Hi,

Let me try and check the result as I need to understand interrupt priority. How it can be config. 

If any example is available please share.

Hi Subrahmanya,

I gone through the sw interrupt example code but I could not understand and found interrupt priority related stuff in the code. Please can you help me into that. Actually I am looking for the interrupt priority register based on user choice to peripheral interrupt. I hope you understand my requirement.

Hi,

what I understand from the document that just I am clarifying here. 

Priority is based on the Groups. Example Group 1.1 has highest priority and Group 1.8  has lowest priority. same for all other groups.

As per my understanding groups are already defined for peripheral which we can not changed. Please correct me If I am wrong.

Hi,

Is it possible to make the highest priority to any peripheral. I mean if I want make the PWM interrupt belong to GROUP3 and I want make highest priority to PWM GROUP1.1. Can is it possible to assign the GROUP to other any peripheral. 

Hi,

Dnyaneshwar Sahane1 said:

Priority is based on the Groups. Example Group 1.1 has highest priority and Group 1.8  has lowest priority.

correct. As noted in the above post and the documents sent "interrupts are automatically prioritized by the C28x hardware."

Please refer to the link "https://processors.wiki.ti.com/index.php/Interrupt_Nesting_on_C28x#Interrupt_Prioritization" I sent above.
Go through "Adding simple software prioritization" section.
This should clarify your doubts.

Dnyaneshwar Sahane1 said:

Is it possible to make the highest priority to any peripheral. I mean if I want make the PWM interrupt belong to GROUP3 and I want make highest priority to PWM GROUP1.1. Can is it possible to assign the GROUP to other any peripheral. 

Hi Subrahmanya,

Thanks for clarification. I will check and update on interrupt priority. But for testing can you tell one thing, I can only assign the priority within the group as I understood from your statement and the link. Is that my understanding correct?

Hi,

Dnyaneshwar Sahane1 said:

I can only assign the priority within the group as I understood from your statement and the link. Is that my understanding correct?

Hi,

OK. I will check and update on this. But I did not clear from your statement. I will have to check detail in document. I will update on interrupt priority.

Hi,

Please share what is the difference in below two XINT configuration

1: configuration (XINT2)- When this type of configuration used? 

GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 0; // GPIO
GpioCtrlRegs.GPADIR.bit.GPIO20 = 0; // input
GpioCtrlRegs.GPAQSEL2.bit.GPIO20 = 2; // XINT2 Qual using 6 samples
GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = 0xFF; // Each sampling window is 510*SYSCLKOUT

2: configuration (XINT1): When this type of configuration used?

GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 0; // GPIO
GpioCtrlRegs.GPADIR.bit.GPIO21 = 0; // input
GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 0; // XINT1 Synch to SYSCLKOUT only

I have configured both and both are working but could not understand the use.

Hi,

Are you asking about
GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = 0xFF; // Each sampling window is 510*SYSCLKOUT ?

This is input qualification logic on the GPIO.  This filters glitches on the input signal.
Please refer to device TRM GPIO section, input qualification logic.

other than this is there any advantage of GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = 0xFF; // Each sampling window is 510*SYSCLKOUT 

Can I used any of the above mentioned configuration?

Hi,

No. This is meant to configure input qualification logic. Typically used for noise filtering. 

so the functionality will be same for both. What I understood from the TRM and example code of XINT is that qualification logic is used for the filtering and noise

cancellation or denouncing in the input signal. This is slower than other configuration as in this configuration multiple sample are taken to ensure and final

interrupt will be generated. Is that my understanding correct?

Reference to my original post. What can be the  reason after PWM interrupt is enable the XINT2 is getting disabled. I am looking for the solution. In this code I

am using device driverlib. In that code this issue is accrued. If anyone have any solution or suggestion is always most welcome.

Hi,

Dnyaneshwar Sahane1 said:

This is slower than other configuration as in this configuration multiple sample are taken to ensure and final

interrupt will be generated. Is that my understanding correct?