I have an application where it would be beneficial to run the PWM clock at 200MHz, as opposed to the 100MHz baseline (ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV= 1 with a 200MHz SYSCLK).
If I set ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV to 0 with the 200MHz SYSCLK the pwm clock will be 200MHz. What are the detrimental effects of doing this?
Thanks in advance for any insight.