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Hi Expert,
Customer finds that the Index Event Latch function is disabled when configure "GpioCtrlRegs.QDECCTL.bit.SPSEL = 0;", however if set this bit, latch function works.
The explanation in TRM is "0h (R/W) = Index pin is used for sync output".
Could you explain the reason or you need more configure information, and what kind information to locate this issue?
Thanks!
Best Regards
Rayna
Hi,
Thats correct. SPSEL is for defining which pin with be used for bringing out the Sync output.
In the normal QEP operation the index and strobe pins should be in the input mode.
The setting of this bit should not have any impact in the normal QEP operation when the Index and strobe signals are inputs.
What is the configuration in use?
Is the customer trying to bring out Sync out put on Index or Strobe pins?