CCS/TMS320F28379D: CPU2 does not allow to access MUX register???

Dnyaneshwar Sahane1

Tool/software: Code Composer Studio

Hi,

I am using DUAL core. When I call any MUX register in CPU2 code then it is giving an error. Does the CPU2 does not have MUX register access.

All the MUX authority is belongs to CPU1 only?

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GPIO_SetupPinMux(168, GPIO_MUX_CPU2, 1);
GPIO_SetupPinOptions(168, GPIO_OUTPUT, GPIO_ASYNC);

GpioCtrlRegs.GPFMUX1.bit.GPIO167 = 1; // Configure GPIO167 as EPWM12A
GpioCtrlRegs.GPFMUX1.bit.GPIO168 = 1; // Configure GPIO168 as EPWM12B

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All the library files are included same as CPU1 in CPU2 or is there anything I have missed?

over 6 years ago

0 Vasudha Bhadoria over 6 years ago

TI__Genius 10845 points

Hi,

Yes, GPIO specifc configuration can be done through CPU 1 only as these registers are available only for CPU1. After configuring the GPIO, the ownership of the GPIO should be passed to the required core(CPU2, CPU1.CLA, CPU2.CLA etc.) which can either set, clear or toggle the pin (if configured in GPIO mode). Refer to "Figure 8-1 GPIO Logic for a Single Pin" in device TRM for more details.

Thanks

Vasudha

0 Dnyaneshwar Sahane1 over 6 years ago in reply to Vasudha Bhadoria

Expert 1770 points

Hi Vasudha,

Thanks for clarification. I have already done the same and it is working but for clarification and understanding I had raise this ticket.

0 Dnyaneshwar Sahane1 over 6 years ago in reply to Dnyaneshwar Sahane1

Expert 1770 points

This has resolved the issue. I have mark the ticket as Resolved.

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CCS/TMS320F28379D: CPU2 does not allow to access MUX register???