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Hi expert,
My customer meets below phenomenon when developing F28069: Their on-chip watchdog timer is set to around 838ms while erasing a sector with flash API takes around 2s. They didn't disable the dog when do the erase task but the F28069 is not reset.
They guess the flash API will put CPU into halt mode so that watchdog didn't go overflow but they can't find any support for this from TI's documents. It seems halt mode can only be entered by executing some CPU instruction.
Could you help me check if "CPU will enter halt mode when perform a flash erase so that watchdog will not over flow"? I want the answer for both F280049 and F28069 separately.
Thanks
Sheldon
Hi Sheldon,
Speaking on the F2806x Flash API only. Please review the Flash API doc in C2000ware:
C:\ti\c2000\C2000Ware_3_01_00_00\libraries\flash_api\f2806x\docs
By default the watchdog gets disabled internal to the Flash API functions. This can be overridden in the scenario that the system has an external WD that needs to be serviced, where the WD servicing is carried out by user code inserted in the Callback function. Please note the caution statement below if the WD disable is overridden. See step 8 and 10 in the Flash API guide for more info.
Best,
Kevin
