Tool/software: Code Composer Studio
Hello,
Need help to configure I2C on CPU2. I run the following on CPU1:
Device_bootCPU2(BOOTMODE_BOOT_TO_M0RAM);
GPIO_setPinConfig(GPIO_32_SDAA);
GPIO_setPinConfig(GPIO_33_SCLA);
GPIO_setMasterCore(32, GPIO_CORE_CPU2);
GPIO_setMasterCore(33, GPIO_CORE_CPU2);
Try to initial the I2CA on CPU2:
//
// Must put I2C into reset before configuring it
//
I2C_disableModule(I2CA_BASE);
//
// I2C configuration. Use a 400kHz I2CCLK with a 50% duty cycle.
//
I2C_initMaster(I2CA_BASE, DEVICE_SYSCLK_FREQ, 400000, I2C_DUTYCYCLE_50);
I2C_setConfig(I2CA_BASE, I2C_MASTER_SEND_MODE);
I2C_setDataCount(I2CA_BASE, 2);
I2C_setBitCount(I2CA_BASE, I2C_BITCOUNT_8);
//
// Configure for internal loopback mode
//
I2C_setSlaveAddress(I2CA_BASE, SLAVE_ADDRESS);
I2C_setOwnSlaveAddress(I2CA_BASE, SLAVE_ADDRESS);
I2C_enableLoopback(I2CA_BASE);
I2C_setEmulationMode(I2CA_BASE, I2C_EMULATION_STOP_SCL_LOW);
//
// FIFO and interrupt configuration
//
I2C_enableFIFO(I2CA_BASE);
I2C_clearInterruptStatus(I2CA_BASE, I2C_INT_RXFF | I2C_INT_TXFF);
//
// Transmit FIFO interrupt levels are set to generate an interrupt
// when the 16 byte TX fifo contains 2 or lesser bytes of data.
// Receive FIFO interrupt levels are set to generate an interrupt
// when the 16 byte RX fifo contains 2 or greater bytes of data.
//
I2C_setFIFOInterruptLevel(I2CA_BASE, I2C_FIFO_TX2, I2C_FIFO_RX2);
I2C_enableInterrupt(I2CA_BASE, I2C_INT_RXFF | I2C_INT_TXFF);
//
// Configuration complete. Enable the module.
//
I2C_enableModule(I2CA_BASE);
Watch the register window and it looks the values are not written into the register. Not sure what is missing.
Thanks,
