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TMS320F28335: F28335

Part Number: TMS320F28335

Hello,

The module 12 of the following resource is for I2C communication.

http://www.ti.com/lit/zip/ssqc019

I understand that after sending the address SCD is polled. Because SCD will be set when the internal data counter (Value in I2CCNT) counts down to 0.

Also, hen STT is not set ARDY is polled as an indication that the counter has counted down to 0.

But why can't we initially set the NACK bit and then poll the NACK bit (I2CSTR.1)? Thus, if it becomes 0, then it means acknowledgement has been sent by the receiver.

According to the I2C manual:

"NACK applies when the I2C module is a transmitter (master or
slave). NACK indicates whether the I2C module has detected an
acknowledge bit (ACK) or a no-acknowledge bit (NACK) from the
receiver. The CPU can poll NACK or use the NACK interrupt
request."

1. But NACK is never polled. It is the SCD/ARDY that is polled. Why is that so?

2. Also, only if we poll the NACK bit, we can actually know if the acknowledgement has been sent by the receiver and we can proceed on to sending the next data. But how can polling SCD/ARDY be indicative of whether ACK is sent by the receiver and whether the next data can be sent? SCD/ARDY can indicate only if the number of bytes set in I2CCNT has been transmitted. Without polling NACK how can we know if the slave has received the data?

Thanks in advance!

  • Hi Anu,

    Anu B said:
    But why can't we initially set the NACK bit and then poll the NACK bit (I2CSTR.1)? Thus, if it becomes 0, then it means acknowledgement has been sent by the receiver.

    Writing a 1 to the I2CSTR.NACK bit will manually clear it to 0, so this will not work. The NACK bit is intended for detecting NACKs, not ACKs.

    Anu B said:
    SCD/ARDY can indicate only if the number of bytes set in I2CCNT has been transmitted. Without polling NACK how can we know if the slave has received the data?

    You can utilize an interrupt to handle NACKs when they're received. Or use something like the below if polling. Note this is for non-FIFO mode.

        // Transmit Register Bytes
        for (i=0; i< reg_size; i++)
        {
            while(!I2caRegs.I2CSTR.bit.XRDY){} // Make sure data
                                               // is ready to be written
            I2caRegs.I2CDXR = reg[i];
            
            // Add delay here for TX to complete....
    
            #if NACK_CHECK // check if NACK was received
                if(I2caRegs.I2CSTR.bit.NACK == 1)
                {
                    I2caRegs.I2CMDR.bit.STP = 1;
                    I2caRegs.I2CSTR.all = I2C_CLR_NACK_BIT;
    
                    Status = I2C_ERROR;
                    return Status;
                }
            #endif
        }

    Best,

    Kevin

  • Thanks!

    But, why do the example codes just poll ARDY and never check if the receiver had actually acknowledged it?

    This is what is done:

    I2caRegs.I2CCNT = 1; // 1 byte message
    I2caRegs.I2CDXR = POINTER_TEMPERATURE;
    I2caRegs.I2CMDR.all = 0x6620; // master-receiver, START, STOP
    while(I2caRegs.I2CSTR.bit.ARDY == 0); // poll ARDY-  wait for STOP condition

    After this, the next transmission starts.

     So, without checking for ACK bit, the next transmission is started. Why is that?  

     Everywhere, its been told that if the slave device does not acknowledge the transfer, then the next data/ transfer can not be initiated. But the example code doesn't do that. So, isn't that supposed to be wrong since we will never know if the receiver had actually received it?

  • Anu,

    Please give us TI folks a few days to get back to you before opening a new thread in the future.

    Discussion continued on: https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/901529/3333635#3333635

    best,

    Kevin