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TMS320F28379D: Question about the F28379D Memory Access Arbitration

Hainan Wang
Intellectual 450 points
Part Number: TMS320F28379D

Hi there

I am using the TMS320F28379D CPU1 and CLA. I have a question about the local shared memory access arbitration.

Based on the "Technical Reference Manual" (spruhm8i.pdf) page 134-135. There is a round robin arbitration scheme (Figure 3-15) for the local shared memory between CPU and CLA. However, it did not state very clearly does the arbitration based on the entire memory block or 16-bit word or 32-bit word.

For example, if CPU1 and CLA are both access an 32-bit word, CLA are writing to it and CPU are reading to it. If the arbitration is based on 16-bit word, then it is possible that after CLA only write 16-bits then CPU is trying to get all 32 bits, that will be bad for the control loop.

Based on my reading, the arbitration should be based on the entire block. That means, if the CLA are access LS1, CPU will have no right to access the entire LS1, not just the address the CLA is accessing.

Could you let me know?

Thanks

  • 0
    TI__Guru** 115271 points

    Hi,

    Based on my reading, the arbitration should be based on the entire block. That means, if the CLA are access LS1, CPU will have no right to access the entire LS1, not just the address the CLA is accessing.

    All the RAMs on this device is single port memory so at a time only one access can be made to memory. That means either CPU or CLA (only one master) can access the LSx RAM at any given time. So yes, arbitration is based on entire RAM block. Also arbitration is done for each single access. Single access can be 16bit or 32bit.

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Intellectual 450 points

    Just try to be clear. If one master(either CPU or CLA) is trying to write/Read a float number, or a unsigned long(32-bit), it is considered one access to finish writing the whole 32 bit. It will not do 16bit at a time, right?

    Thanks

    Eric

  • 0 in reply to Hainan Wang
    Intellectual 450 points

    I think I am not very clear for the last question. What I like to know is that when one master write or read a 32bit long, does it take 1 write or 2?

    If it takes 2, will it write one 16bit then wait for arbitration to write another 16bit?

    Eric

  • 0 in reply to Hainan Wang
    TI__Guru** 115271 points

    Wang,

    I think I am not very clear for the last question. What I like to know is that when one master write or read a 32bit long, does it take 1 write or 2?

    It will take one cycle only.

    Regards,

    Vivek Singh.

  • 0 in reply to Vivek Singh
    Intellectual 450 points

    Hi, Vivek

    Thanks so much for your quick reply.

    As you replied, for data defined as float or 32-bit interger, it will only take one access. 

    but for data defined as "double", 64-bit Interger, how many access will it take? if it takes 2, will it be that it finish one 32 bit and have to wait another arbitration to finish the second 32-bit? Or it can surely finished the whole 64 bit before it lose arbitration?

    Thanks so much for your patience.

    Eric

  • 0 in reply to Hainan Wang
    TI__Guru** 115271 points

    Eric,

    Max access size is 32bit so 64bit access will be two 32bit access and in that case second 32bit access will happen after arbitration only if there is pending access from other master.

    Regards,

    Vivek Singh