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I Customized a bootloader, but after it jumps to the address specified by the application, the application does not execute successfully.
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I Customized a bootloader, but after it jumps to the address specified by the application, the application does not execute successfully.
Hello
Please provide more detail. Your bootloader is part of your application? What does the flow of your app+bootloader look like? What do you mean by application does not execute successfully? Is it reaching the application?
Best regards
Chris
I have to develop a bootloader for the TMS320F28027F controller. Therefore, I plan to use flash A for the bootloader, flash B to D for the application code. As I know, the ROM bootloader entry point is at the adress 0x3F7FF6, which is the address that my bootloader entry point. So I set my app entry point at 0x3F0000.
And my CMD(28027F.CMD) file configuration is as follows. But when I used the emulator, it can jump from my bootloader to application execution success, but without emulation, it can jump to application execution failure.
bootloader CMD:
MEMORY { PAGE 0: /* Program Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */ CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */ CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */ IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */ IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */ ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */ FLASHB_D : origin = 0x3F0000, length = 0x006000 /* on-chip FLASH B, C and D */ FLASHA : origin = 0x3F6000, length = 0x001F80 /* on-chip FLASH A */ P_RAML0 : origin = 0x008000, length = 0x000980 /* on-chip PRAM block L0 */ PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */ /* Registers remain on PAGE1 */ RAMM0_M1 : origin = 0x000000, length = 0x000600 /* on-chip RAM block M0 + M1. 0x600 to 0x800 reserved for InstaSPIN */ D_RAML0 : origin = 0x008980, length = 0x000680 /* on-chip DRAM block L0 */ } /* Allocate sections to memory blocks. Note: codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code execution when booting to flash ramfuncs user defined section to store functions that will be copied from Flash into RAM */ SECTIONS { /* Allocate program areas: */ /* The Flash API functions can be grouped together as shown below. The defined symbols _Flash28_API_LoadStart, _Flash28_API_LoadEnd and _Flash28_API_RunStart are used to copy the API functions out of flash memory and into SARAM */ /******************************************************************/ /* For Piccolo B we dont need to copy the API from Flash as it is */ /* present in BOOT ROM */ /******************************************************************/ Flash28_API: { -l Flash2802x_API_V201.lib(.text) -l Flash2802x_API_V201.lib(.econst) } LOAD = FLASHA, RUN = P_RAML0, LOAD_START(_Flash28_API_LoadStart), LOAD_END(_Flash28_API_LoadEnd), RUN_START(_Flash28_API_RunStart), PAGE = 0 /* Allocate program areas: */ .cinit : > FLASHA PAGE = 0 .pinit : > FLASHA, PAGE = 0 .text : > FLASHA PAGE = 0 codestart : > BEGIN PAGE = 0 ramfuncs : LOAD = FLASHA, RUN = P_RAML0, LOAD_START(_RamfuncsLoadStart), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), PAGE = 0 csmpasswds : > CSM_PWL_P0 PAGE = 0 csm_rsvd : > CSM_RSVD PAGE = 0 /* Allocate uninitalized data sections: */ .stack : > RAMM0_M1 PAGE = 1 .ebss : > D_RAML0 PAGE = 1 .esysmem : > RAMM0_M1 PAGE = 1 ebss_extension : > P_RAML0 PAGE = 0 rom_accessed_data : > RAMM0_M1 PAGE = 1 vib_buf_data : > D_RAML0 PAGE = 1 graph_data : > D_RAML0 PAGE = 1 FlashScalingVar : > RAMM0_M1 PAGE = 1 FlashCallbackVar : > RAMM0_M1 PAGE = 1 /* Initalized sections go in Flash */ /* For SDFlash to program these, they must be allocated to page 0 */ .econst : > FLASHA, PAGE = 0 .switch : > FLASHA, PAGE = 0 /* Allocate IQ math areas: */ IQmath : > FLASHA PAGE = 0 /* Math Code */ IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD /* Uncomment the section below if calling the IQNexp() or IQexp() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNexpTable.obj> (IQmathTablesRam) } */ /* Uncomment the section below if calling the IQNasin() or IQasin() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables3 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNasinTable.obj> (IQmathTablesRam) } */ /* .reset is a standard section used by the compiler. It contains the */ /* the address of the start of _c_int00 for C Code. */ /* When using the boot ROM this section and the CPU vector */ /* table is not needed. Thus the default type is set here to */ /* DSECT */ .reset : > RESET, PAGE = 0, TYPE = DSECT vectors : > VECTORS PAGE = 0, TYPE = DSECT }
app CMD:
MEMORY { PAGE 0: /* Program Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */ CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */ IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */ IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */ ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */ BEGIN : origin = 0x3F0000, length = 0x000002 /* Part of FLASHD. Used for "boot to Flash" bootloader mode. */ FLASHB_D : origin = 0x3F0002, length = 0x005FFE /* on-chip FLASH B, C and D */ FLASHA : origin = 0x3F6000, length = 0x001F80 /* on-chip FLASH A */ P_RAML0 : origin = 0x008000, length = 0x000980 /* on-chip PRAM block L0 */ PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */ /* Registers remain on PAGE1 */ RAMM0_M1 : origin = 0x000000, length = 0x000600 /* on-chip RAM block M0 + M1. 0x600 to 0x800 reserved for InstaSPIN */ D_RAML0 : origin = 0x008980, length = 0x000680 /* on-chip DRAM block L0 */ } /* Allocate sections to memory blocks. Note: codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code execution when booting to flash ramfuncs user defined section to store functions that will be copied from Flash into RAM */ SECTIONS { /* Allocate program areas: */ .cinit : > FLASHB_D PAGE = 0 .pinit : > FLASHB_D, PAGE = 0 .text : > FLASHB_D PAGE = 0 codestart : > BEGIN PAGE = 0 ramfuncs : LOAD = FLASHB_D, RUN = P_RAML0, LOAD_START(_RamfuncsLoadStart), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), PAGE = 0 csmpasswds : > CSM_PWL_P0 PAGE = 0 csm_rsvd : > CSM_RSVD PAGE = 0 /* Allocate uninitalized data sections: */ .stack : > RAMM0_M1 PAGE = 1 .ebss : > D_RAML0 PAGE = 1 .esysmem : > RAMM0_M1 PAGE = 1 ebss_extension : > P_RAML0 PAGE = 0 rom_accessed_data : > RAMM0_M1 PAGE = 1 vib_buf_data : > D_RAML0 PAGE = 1 graph_data : > D_RAML0 PAGE = 1 /* Initalized sections go in Flash */ /* For SDFlash to program these, they must be allocated to page 0 */ .econst : LOAD = FLASHB_D, RUN = P_RAML0, LOAD_START(_econst_start), LOAD_END(_econst_end), RUN_START(_econst_ram_load), PAGE = 0 .switch : LOAD = FLASHB_D, RUN = P_RAML0, LOAD_START(_switch_start), LOAD_END(_switch_end), RUN_START(_switch_ram_load), PAGE = 0 /* Allocate IQ math areas: */ IQmath : > FLASHB_D PAGE = 0 /* Math Code */ IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD /* Uncomment the section below if calling the IQNexp() or IQexp() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNexpTable.obj> (IQmathTablesRam) } */ /* Uncomment the section below if calling the IQNasin() or IQasin() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables3 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNasinTable.obj> (IQmathTablesRam) } */ /* .reset is a standard section used by the compiler. It contains the */ /* the address of the start of _c_int00 for C Code. */ /* When using the boot ROM this section and the CPU vector */ /* table is not needed. Thus the default type is set here to */ /* DSECT */ .reset : > RESET, PAGE = 0, TYPE = DSECT vectors : > VECTORS PAGE = 0, TYPE = DSECT }
Hello
I don't see any obvious issues with your linker command files.
Without emulation, is it reaching the bootloader in flash? Note that the boot behavior is different when debugger is connected and when it isn't. Make sure GPIO37 and GPIO34 are pulled high to GetBoot in order to boot to flash.
If it is reaching the bootloader, is it branching to the correct application address?
Best regards
Chris
Yes, I download programs to flash. And I didn't configure GPIO34 and GPIO37, they default to pull up. In the bootstrap program, I only set the required peripherals, I2C, etc., without initializing all peripherals.
In previous tests, occasionally a successful jump was made, but only after a long period of time. That's what's been bothering me.
#define APP_CODE_ADDR 0x3F0002 #define APP_START_ADDR 0x3F0000 typedef void (*pFunction)(void); void Flash_Jump_to_Application(void) { if(*((uint32_t *)APP_START_ADDR) != 0xFFFFFFFF) { /* Jump to user application */ #if 0 (*((void(*)(void))APP_START_ADDR))(); #else pFunction jump; jump = (pFunction)(APP_START_ADDR); jump(); #endif } return; }
The following is the map file:
boot map:
****************************************************************************** TMS320C2000 Linker PC v15.12.3 ****************************************************************************** >> Linked Wed May 20 22:48:11 2020 OUTPUT FILE NAME: <boot_proj.out> ENTRY POINT SYMBOL: "_c_int00" address: 003f6fdb MEMORY CONFIGURATION name origin length used unused attr fill ---------------------- -------- --------- -------- -------- ---- -------- PAGE 0: P_RAML0 00008000 00000980 000005d0 000003b0 RWIX OTP 003d7800 00000400 00000000 00000400 RWIX FLASHB_D 003f0000 00006000 00000000 00006000 RWIX FLASHA 003f6000 00001f80 00001331 00000c4f RWIX CSM_RSVD 003f7f80 00000076 00000076 00000000 RWIX BEGIN 003f7ff6 00000002 00000002 00000000 RWIX CSM_PWL_P0 003f7ff8 00000008 00000008 00000000 RWIX IQTABLES 003fe000 00000b50 00000000 00000b50 RWIX IQTABLES2 003feb50 0000008c 00000000 0000008c RWIX IQTABLES3 003febdc 000000aa 00000000 000000aa RWIX ROM 003ff27c 00000d44 00000000 00000d44 RWIX RESET 003fffc0 00000002 00000000 00000002 RWIX VECTORS 003fffc2 0000003e 00000000 0000003e RWIX PAGE 1: RAMM0_M1 00000000 00000600 0000031a 000002e6 RWIX D_RAML0 00008980 00000680 000000c7 000005b9 RWIX SECTION ALLOCATION MAP output attributes/ section page origin length input sections -------- ---- ---------- ---------- ---------------- Flash28_API * 0 003f6000 0000052e RUN ADDR = 00008000 003f6000 000000bc Flash2802x_API_V201.lib : Flash28_Prog.obj (.text) 003f60bc 000000af : Flash28_Erase.obj (.text) 003f616b 0000009a : Flash28_Erase_Pulse.obj (.text) 003f6205 00000084 : Flash28_Internals.obj (.text) 003f6289 00000080 : Flash28_Prog_Pulse.obj (.text) 003f6309 0000007d : Flash28_Compact_Pulse.obj (.text) 003f6386 0000005c : Flash28_EraseSector.obj (.text) 003f63e2 00000054 : Flash28_CompactSector.obj (.text) 003f6436 00000041 : Flash28_ClearLoop.obj (.text) 003f6477 00000034 : Flash28_ClearSector.obj (.text) 003f64ab 00000033 : Flash28_Verify.obj (.text) 003f64de 00000014 : Flash28_Utils.obj (.text) 003f64f2 00000013 : Flash28_Init.obj (.text) 003f6505 0000000d : Flash28_Delay.obj (.text) 003f6512 00000007 : Flash28_DisInt.obj (.text) 003f6519 00000001 --HOLE-- [fill = 0] 003f651a 00000014 : Flash28_Erase.obj (.econst) .text 0 003f652e 00000d1b 003f652e 00000302 hal.obj (.text) 003f6830 000001f5 adc.obj (.text) 003f6a25 00000155 gpio.obj (.text) 003f6b7a 00000118 clk.obj (.text) 003f6c92 000000f5 pie.obj (.text) 003f6d87 000000c9 i2c_handle.obj (.text) 003f6e50 000000c5 i2c.obj (.text) 003f6f15 0000006b Isr.obj (.text:retain) 003f6f80 0000005b pll.obj (.text) 003f6fdb 00000054 rts2800_ml.lib : boot.obj (.text) 003f702f 0000004c wdog.obj (.text) 003f707b 00000046 rts2800_ml.lib : cpy_tbl.obj (.text) 003f70c1 00000033 my_user.obj (.text) 003f70f4 0000002d osc.obj (.text) 003f7121 0000002a flash_handle.obj (.text) 003f714b 00000029 rts2800_ml.lib : exit.obj (.text) 003f7174 00000025 cpu.obj (.text) 003f7199 00000020 flash.obj (.text) 003f71b9 0000001a rts2800_ml.lib : cpy_utils.obj (.text) 003f71d3 00000019 : args_main.obj (.text) 003f71ec 00000019 : prolog.obj (.text) 003f7205 00000010 main.obj (.text) 003f7215 0000000f memCopy.obj (.text) 003f7224 0000000c rts2800_ml.lib : epilog.obj (.text) 003f7230 00000009 : _lock.obj (.text) 003f7239 00000008 CodeStartBranch.obj (.text) 003f7241 00000005 pie.obj (.text:retain) 003f7246 00000002 rts2800_ml.lib : pre_init.obj (.text) 003f7248 00000001 : startup.obj (.text) ramfuncs 0 003f7249 000000a2 RUN ADDR = 0000852e 003f7249 0000004e flash_handle.obj (ramfuncs) 003f7297 00000032 flash.obj (ramfuncs) 003f72c9 0000001e hal.obj (ramfuncs) 003f72e7 00000004 usDelay.obj (ramfuncs) .cinit 0 003f72eb 00000046 003f72eb 00000018 flash_handle.obj (.cinit) 003f7303 00000014 i2c_handle.obj (.cinit) 003f7317 0000000e rts2800_ml.lib : exit.obj (.cinit) 003f7325 00000005 : _lock.obj (.cinit:__lock) 003f732a 00000005 : _lock.obj (.cinit:__unlock) 003f732f 00000002 --HOLE-- [fill = 0] .pinit 0 003f6000 00000000 UNINITIALIZED csm_rsvd 0 003f7f80 00000076 003f7f80 00000076 CSMPasswords.obj (csm_rsvd) codestart * 0 003f7ff6 00000002 003f7ff6 00000002 CodeStartBranch.obj (codestart) csmpasswds * 0 003f7ff8 00000008 003f7ff8 00000008 CSMPasswords.obj (csmpasswds) .stack 1 00000000 00000300 UNINITIALIZED 00000000 00000300 --HOLE--
app map:
****************************************************************************** TMS320C2000 Linker PC v15.12.3 ****************************************************************************** >> Linked Wed May 20 23:04:51 2020 OUTPUT FILE NAME: <xd640v2.out> ENTRY POINT SYMBOL: "_c_int00" address: 003f4102 MEMORY CONFIGURATION name origin length used unused attr fill ---------------------- -------- --------- -------- -------- ---- -------- PAGE 0: P_RAML0 00008000 00000980 0000048a 000004f6 RWIX OTP 003d7800 00000400 00000000 00000400 RWIX BEGIN 003f0000 00000002 00000002 00000000 RWIX FLASHB_D 003f0002 00005ffe 00004ade 00001520 RWIX FLASHA 003f6000 00001f80 00000000 00001f80 RWIX CSM_RSVD 003f7f80 00000076 00000076 00000000 RWIX CSM_PWL_P0 003f7ff8 00000008 00000008 00000000 RWIX IQTABLES 003fe000 00000b50 00000000 00000b50 RWIX IQTABLES2 003feb50 0000008c 00000000 0000008c RWIX IQTABLES3 003febdc 000000aa 00000000 000000aa RWIX ROM 003ff27c 00000d44 00000000 00000d44 RWIX RESET 003fffc0 00000002 00000000 00000002 RWIX VECTORS 003fffc2 0000003e 00000000 0000003e RWIX PAGE 1: RAMM0_M1 00000000 00000600 000004f4 0000010c RWIX D_RAML0 00008980 00000680 0000031d 00000363 RWIX SECTION ALLOCATION MAP output attributes/ section page origin length input sections -------- ---- ---------- ---------- ---------------- .switch 0 00008000 00000000 UNINITIALIZED codestart * 0 003f0000 00000002 003f0000 00000002 CodeStartBranch.obj (codestart) .text 0 003f0002 00004489 003f0002 00000e94 fast_public.lib : ctrl_priv.obj (.text) 003f0e96 00000994 hal.obj (.text) 003f182a 00000897 ctrl.obj (.text) 003f20c1 00000861 check.obj (.text) 003f2922 00000429 user.obj (.text) 003f2d4b 000002f7 pwm.obj (.text) 003f3042 000002a5 my_user.obj (.text) 003f32e7 00000206 Task_Schedule.obj (.text) 003f34ed 000001f5 adc.obj (.text) 003f36e2 00000157 I2C_Slave.obj (.text)
I've been working on it for three weeks, but it's still not working. What should I do?
Hello
If you program bootloader (modified to skip loading app and just jump to app address) and app via CCS, then reset the device, does it reach the final application successfully?
Where is the jump taking so long? You sure it isn't related to loading the app via bootloader?
Are you seeing the device reset when bootloading or jumping to app?
(*((
void
(*)(
void
))APP_START_ADDR))(); is a valid way to jump to application
Best regards
Chris
Yes, When I program bootloader (modified to skip loading app and just jump to app address) and app via CCS with the XDS100V3, I program the app firstly(which I just erase the B to D sector of flash), and then I program the bootloader(which I just erase the A sector of flash). Then I run the simulation after downloading the bootloader, it can reach the final application successfully. Next, I click the reset CPU button on the basis of the simulation, the device can reset successfully and I click running, it can reach the final application successfully.
If I exit the simulation, but the simulator will still be connected to the board, and then power down for one second, next power on, it can reach the final application successfully.
However, When I disconnect the simulator, and then power down for one second, next power on, it can't reach the final application successfully anymore. Even if I connect the simulator again, and then power down for one second, next power on, it can't also reach the final application successfully anymore.
In summary, only if the program is successful after it has just been downloaded, and once the emulator is disconnected and the power is switched off, and then the power is switched on, it can't reach the final application successfully anymore.
There is no prompt light or other things on my current board. And I am trying to find the hardware with LED prompt. When I disconnect the simulator, and power on, it can flash the light to prompt whether to enter the bootloader or not.
I delay it by 1 second in the bootloader before jumping to the application. But I said last time that there was a jump that took a long time, and it should have been wrong, it shouldn't have taken that long.
I found a new board with GPIO34 external pull and LED indication.When I disconnect the emulator, turn off the power and turn on the power again, the LED flashes (it does enter the bootloader, but after jumping to the address, the application does not execute).
Can you give me some user-defined bootloader reference routines?
I found some other problems:
When I directly simulated the application (only the BCD sector was deleted when downloading), When I click the run button, I found that the bootloader in sector A was not executed, that is to say, codestart did not execute from the default address 0x3F7FF6 first, but jumped directly into my application, Does the CMD connection file not working? why?
What I mentioned above is that I did not initialize the external device, but only set the IO port drives the LED. When I initialized multiple peripherals in bootloader, the CPU could not jump successfully through CCS reset in simulation.Do you know why?
Hello
I apologize for the delay, I've been out of office. I will get you a response by end of day tomorrow.
Best regards
Chris
Hello
This flash kernel will be your best reference. Location in C2000Ware:
~\device_support\f2802x\examples\structs\f28027_flash_kernel
Typical flow of the flash kernel is that the kernel gets loaded by the ROM SCI bootloader into RAM, then the flash kernel runs and takes the application via SCI and programs into flash. Then kernel completes and jumps to application in flash.
Make sure to keep in mind during debug that the device boot flow (and decoded boot mode) will vary depending upon whether the debugger is connected or not. Read more on this in the technical reference manual.
See if that reference above if useful. If not, provide an updated summary of your test flow and observed issues.
Best regards
Chris
Dear Christopher Chiarella,
Thank you very much for your reply! I'm sorry to hear that!
I have solved the problem. I have used CCS to rebuild the project using the same compiler (the original application project was used the old compatible version), and the reconstruction project can jump normally. But I don't know what the compiler version differences are that cause these problems. I don't understand that yet.