TMS320F28379D: Question SDFM module

Ralf,

On figure 14-2 of the TRM there is a FIFO after the primary data filter. What is the function of this FIFO?

FIFO (16 level x 32 bits) feature was added to reduce interrupt overhead.

Without FIFO: Data filter will generate data acknowledge event every DOSR x SD-C cycles

With FIFO: Data filter can be configured to generate FIFO data acknowledge event every SDFFIL x DOSR x SD-Cx cycles. This reduce the interrupt overhead

On page 1815 of the TRM (chapter 14.5.2) a “DOSR counter” is mentioned. What is the function if this counter?

DOSR and Filter type in combination is used to change the magnitude response of the filter.

Increasing the DOSR setting improves the filter effective resolution (ENOB) for a given filter type but the trade-off is it increases the latency and reduces the throughput of SDFM filter.

Regards,

Manoj

Ralf,

Are you really sure that the FIFO is implemented in the TMS320F28379D? I haven´t found further information about the FIFO in the TRM of the TMS320F28379D.

My bad. F28379D device doesn't have FIFO. We have FIFO on F28004x and F28388D devices. So, in your device (F28379D) you don't have FIFO in data filter.

Regarding the DOSR counter: the function of the DOSR is clear. My question was issued to the “DOSR counter”. The SDSYNC will clear the counter (TRM page 1815), but there is no more information regarding this counter. Determines the counter the transfer timing from the sinc filter to the SDDATA register?

This is an internal count-down counter whose initial value is DOSR which user configures. For each SD-Cx clock cycles, this internal counter decrements and when the counter reaches zero, filter output is updated and data acknowledge event is triggered. On SD-Cx event, DOSR internal counter is set back to DOSR value configured by the user.

Regards,

Manoj