• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 82 subscribers
  • Views 623 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SAVE ME~~~how to communicate with ECAN in 28035?

shuyoe chen
Prodigy 90 points

Other Parts Discussed in Thread: SN65HVD230

i have composed the program which i want 2 dsp(tms320 f 28035) to communicate each other.

when i run it, then the one in the master always gets into trip ( while(ECanaRegs.CANTA.all != 0x0000FFFF ) ) to wait the CANTA

register changing to 1.  always~~~(of course, i did wire the transceiver for ECAN, numbered SN65HVD230 )

i have tried masive times, i am nearly dying.  

this problem really drives me crazy~~

can any kind rescurer help me to correct the program which Refers to attachment?

please~~~

 below file's Filename Extension should be exchanged .txt into .c

Fullscreen 7651.master_main.txt Download 
#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File

void main(void)
{

    Uint16  j;
   struct ECAN_REGS ECanaShadow;
   InitSysCtrl();
{
   EALLOW;
    GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0;     // Enable pull-up for GPIO30 (CANRXA)
    GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0;     // Enable pull-up for GPIO31 (CANTXA)
    GpioCtrlRegs.GPAQSEL2.bit.GPIO30 = 3;   // Asynch qual for GPIO30 (CANRXA)
    GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1;    // Configure GPIO30 for CANRXA operation
    GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1;    // Configure GPIO31 for CANTXA operation
    EDIS;
}  

   DINT;
   InitPieCtrl();
   IER = 0x0000;
   IFR = 0x0000;
   InitPieVectTable();
   caninit(); // Initialize eCAN-A module






    // Write to the mailbox RAM field of MBOX0 - 15
    ECanaMboxes.MBOX0.MDL.all = 0x12345678;
    ECanaMboxes.MBOX0.MDH.all = 0x13579ace;

    ECanaMboxes.MBOX1.MDL.all = 0x11111111;
    ECanaMboxes.MBOX1.MDH.all = 0x11111111;

    ECanaMboxes.MBOX2.MDL.all = 0x22222222;
    ECanaMboxes.MBOX2.MDH.all = 0x22222222;

    ECanaMboxes.MBOX3.MDL.all = 0x33333333;
    ECanaMboxes.MBOX3.MDH.all = 0x33333333;

    ECanaMboxes.MBOX4.MDL.all = 0x44444444;
    ECanaMboxes.MBOX4.MDH.all = 0x44444444;

    ECanaMboxes.MBOX5.MDL.all = 0x55555555;
    ECanaMboxes.MBOX5.MDH.all = 0x55555555;

    ECanaMboxes.MBOX6.MDL.all = 0x66666666;
    ECanaMboxes.MBOX6.MDH.all = 0x66666666;

    ECanaMboxes.MBOX7.MDL.all = 0x77777777;
    ECanaMboxes.MBOX7.MDH.all = 0x77777777;

    ECanaMboxes.MBOX8.MDL.all = 0x88888888;
    ECanaMboxes.MBOX8.MDH.all = 0x88888888;

    ECanaMboxes.MBOX9.MDL.all = 0x99999999;
    ECanaMboxes.MBOX9.MDH.all = 0x99999999;

    ECanaMboxes.MBOX10.MDL.all = 0xaaaaaaaa;
    ECanaMboxes.MBOX10.MDH.all = 0xaaaaaaaa;

    ECanaMboxes.MBOX11.MDL.all = 0xbbbbbbbb;
    ECanaMboxes.MBOX11.MDH.all = 0xbbbbbbbb;

    ECanaMboxes.MBOX12.MDL.all = 0xcccccccc;
    ECanaMboxes.MBOX12.MDH.all = 0xcccccccc;

    ECanaMboxes.MBOX13.MDL.all = 0xdddddddd;
    ECanaMboxes.MBOX13.MDH.all = 0xdddddddd;

    ECanaMboxes.MBOX14.MDL.all = 0xeeeeeeee;
    ECanaMboxes.MBOX14.MDH.all = 0xeeeeeeee;

    ECanaMboxes.MBOX15.MDL.all = 0xffffffff;
    ECanaMboxes.MBOX15.MDH.all = 0xffffffff;

    // Since this write is to the entire register (instead of a bit
    // field) a shadow register is not required.
///    EALLOW;
///    ECanaRegs.CANMIM.all = 0xFFFFFFFF;

    // Configure the eCAN for self test mode
    // Enable the enhanced features of the eCAN.
///    EALLOW;
///    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
///    ECanaShadow.CANMC.bit.STM = 1;    // Configure CAN for self-test mode
///    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
///    EDIS;

    // Begin transmitting
    for(;;)
    {

       ECanaRegs.CANTRS.all = 0x0000FFFF;  // Set TRS for all transmit mailboxes
       while(ECanaRegs.CANTA.all != 0x0000FFFF ) {}  // Wait for all TAn bits to be set..
       ECanaRegs.CANTA.all = 0x0000FFFF;   // Clear all TAn
       while(ECanaRegs.CANTA.all != 0x00000000 ) {}

    }
}




//===========================================================================
// No more.
//===========================================================================

Fullscreen 0842.initial_master.txt Download 
#include "DSP2803x_Device.h"     // DSP28 Headerfile Include File
#include "DSP2803x_Examples.h"   // DSP28 Examples Include File

void caninit(void)        // Initialize eCAN-A module
{
struct ECAN_REGS ECanaShadow;
    EALLOW;     // EALLOW enables access to protected bits
    ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
    ECanaShadow.CANTIOC.bit.TXFUNC = 1;
    ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;

    ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
    ECanaShadow.CANRIOC.bit.RXFUNC = 1;
    ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;

    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.SCB = 1;
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

/* Configure bit timing parameters for eCANA*/
    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.CCR = 1 ;            // Set CCR = 1
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

    // Wait until the CPU has been granted permission to change the configuration registers
    do
    {
      ECanaShadow.CANES.all = ECanaRegs.CANES.all;
    } while(ECanaShadow.CANES.bit.CCE != 1 );       // Wait for CCE bit to be set..

    ECanaShadow.CANBTC.all = 0;
    /* The following block is only for 60 MHz SYSCLKOUT. (30 MHz CAN module clock Bit rate = 1 Mbps
       See Note at end of file. */

    ECanaShadow.CANBTC.bit.BRPREG = 2;
    ECanaShadow.CANBTC.bit.TSEG2REG = 1;
    ECanaShadow.CANBTC.bit.TSEG1REG = 6;

    ECanaShadow.CANBTC.bit.SAM = 1;
    ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;


    ECanaMboxes.MBOX0.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX1.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX2.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX3.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX4.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX5.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX6.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX7.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX8.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX9.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX10.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX11.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX12.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX13.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX14.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX15.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX16.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX17.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX18.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX19.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX20.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX21.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX22.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX23.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX24.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX25.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX26.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX27.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX28.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX29.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX30.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX31.MSGCTRL.all = 0x00000000;

    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.CCR = 0 ;            // Set CCR = 0
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

    // Wait until the CPU no longer has permission to change the configuration registers
    do
    {
      ECanaShadow.CANES.all = ECanaRegs.CANES.all;
    } while(ECanaShadow.CANES.bit.CCE != 0 );       // Wait for CCE bit to be  cleared..


// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
//  as a matter of precaution.
    ECanaRegs.CANTRR.all=0xffffffff;
    do
    {
      ECanaShadow.CANTRS.all = ECanaRegs.CANTRS.all;
    } while(ECanaShadow.CANTRS.all != 0 );       


    ECanaRegs.CANTA.all = 0xFFFFFFFF;   /* Clear all TAn bits */
    ECanaRegs.CANRMP.all = 0xFFFFFFFF;  /* Clear all RMPn bits */
    ECanaRegs.CANGIF0.all = 0xFFFFFFFF; /* Clear all interrupt flag bits */
    ECanaRegs.CANGIF1.all = 0xFFFFFFFF;

/* Disable all Mailboxes  */
    ECanaRegs.CANME.all = 0;        // Required before writing the MSGIDs

    // Mailboxs can be written to 16-bits or 32-bits at a time
    // Write to the MSGID field of TRANSMIT mailboxes MBOX0 - 15
    ECanaMboxes.MBOX0.MSGID.all = 0x80000000;
    ECanaMboxes.MBOX1.MSGID.all = 0x80000001;
    ECanaMboxes.MBOX2.MSGID.all = 0x80000002;
    ECanaMboxes.MBOX3.MSGID.all = 0x80000003;
    ECanaMboxes.MBOX4.MSGID.all = 0x80000004;
    ECanaMboxes.MBOX5.MSGID.all = 0x80000005;
    ECanaMboxes.MBOX6.MSGID.all = 0x80000006;
    ECanaMboxes.MBOX7.MSGID.all = 0x80000007;
    ECanaMboxes.MBOX8.MSGID.all = 0x80000008;
    ECanaMboxes.MBOX9.MSGID.all = 0x80000009;
    ECanaMboxes.MBOX10.MSGID.all = 0x8000000A;
    ECanaMboxes.MBOX11.MSGID.all = 0x8000000B;
    ECanaMboxes.MBOX12.MSGID.all = 0x8000000C;
    ECanaMboxes.MBOX13.MSGID.all = 0x8000000D;
    ECanaMboxes.MBOX14.MSGID.all = 0x8000000E;
    ECanaMboxes.MBOX15.MSGID.all = 0x8000000F;

    // Write to the MSGID field of RECEIVE mailboxes MBOX16 - 31
    ECanaMboxes.MBOX16.MSGID.all = 0x81111110;
    ECanaMboxes.MBOX17.MSGID.all = 0x81111111;
    ECanaMboxes.MBOX18.MSGID.all = 0x81111112;
    ECanaMboxes.MBOX19.MSGID.all = 0x81111113;
    ECanaMboxes.MBOX20.MSGID.all = 0x81111114;
    ECanaMboxes.MBOX21.MSGID.all = 0x81111115;
    ECanaMboxes.MBOX22.MSGID.all = 0x81111116;
    ECanaMboxes.MBOX23.MSGID.all = 0x81111117;
    ECanaMboxes.MBOX24.MSGID.all = 0x81111118;
    ECanaMboxes.MBOX25.MSGID.all = 0x81111119;
    ECanaMboxes.MBOX26.MSGID.all = 0x8111111A;
    ECanaMboxes.MBOX27.MSGID.all = 0x8111111B;
    ECanaMboxes.MBOX28.MSGID.all = 0x8111111C;
    ECanaMboxes.MBOX29.MSGID.all = 0x8111111D;
    ECanaMboxes.MBOX30.MSGID.all = 0x8111111E;
    ECanaMboxes.MBOX31.MSGID.all = 0x8111111F;

    // Specify that 8 bits will be sent/received
    ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX2.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX3.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX4.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX5.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX6.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX7.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX8.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX9.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX10.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX11.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX12.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX13.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX14.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX15.MSGCTRL.bit.DLC = 8;

    // Configure Mailboxes 0-15 as Tx, 16-31 as Rx
    // Since this write is to the entire register (instead of a bit
    // field) a shadow register is not required.
    ECanaRegs.CANMD.all = 0xFFFF0000;

    // Enable all Mailboxes */
    // Since this write is to the entire register (instead of a bit
    // field) a shadow register is not required.
    ECanaRegs.CANME.all = 0xFFFFFFFF; 



//    EDIS;
}

//---------------------------------------------------------------------------
// Example: InitECanGpio:
//---------------------------------------------------------------------------
// This function initializes GPIO pins to function as eCAN pins
//
// Each GPIO pin can be configured as a GPIO pin or up to 3 different
// peripheral functional pins. By default all pins come up as GPIO
// inputs after reset.
//
// Caution:
// Only one GPIO pin should be enabled for CANTXA operation.
// Only one GPIO pin shoudl be enabled for CANRXA operation.
// Comment out other unwanted lines.



/* Note: Bit timing parameters must be chosen based on the network parameters such as
   the sampling point desired and the propagation delay of the network. The propagation
   delay is a function of length of the cable, delay introduced by the
   transceivers and opto/galvanic-isolators (if any).

   The parameters used in this file must be changed taking into account the above mentioned
   factors in order to arrive at the bit-timing parameters suitable for a network.
*/

//===========================================================================
// End of file.
//===========================================================================

Fullscreen 3755.slave_main.txt Download 
#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File

long ffff[16]={0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
void main(void)
{

   struct ECAN_REGS ECanaShadow;
   InitSysCtrl();
{
   EALLOW;
    GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0;     // Enable pull-up for GPIO30 (CANRXA)
    GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0;     // Enable pull-up for GPIO31 (CANTXA)
    GpioCtrlRegs.GPAQSEL2.bit.GPIO30 = 3;   // Asynch qual for GPIO30 (CANRXA)
    GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1;    // Configure GPIO30 for CANRXA operation
    GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1;    // Configure GPIO31 for CANTXA operation
    EDIS;
}  

   DINT;
   InitPieCtrl();
   IER = 0x0000;
   IFR = 0x0000;
   InitPieVectTable();
   caninitsalve(); // Initialize eCAN-A module



    // Configure the eCAN for self test mode
    // Enable the enhanced features of the eCAN.
///    EALLOW;
///    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
///    ECanaShadow.CANMC.bit.STM = 1;    // Configure CAN for self-test mode
///    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
///    EDIS;

    // Begin waiting
    for(;;)
    {
     ffff[0] = ECanaMboxes.MBOX0.MDL.all;
     ffff[1] = ECanaMboxes.MBOX1.MDL.all;
     ffff[2] = ECanaMboxes.MBOX2.MDL.all;
     ffff[3] = ECanaMboxes.MBOX3.MDL.all;
     ffff[4] = ECanaMboxes.MBOX4.MDL.all;
     ffff[5] = ECanaMboxes.MBOX5.MDL.all;
     ffff[6] = ECanaMboxes.MBOX6.MDL.all;
     ffff[7] = ECanaMboxes.MBOX7.MDL.all;
     ffff[8] = ECanaMboxes.MBOX8.MDL.all;
     ffff[9] = ECanaMboxes.MBOX9.MDL.all;
     ffff[10] = ECanaMboxes.MBOX10.MDL.all;
     ffff[11] = ECanaMboxes.MBOX11.MDL.all;
     ffff[12] = ECanaMboxes.MBOX12.MDL.all;
     ffff[13] = ECanaMboxes.MBOX13.MDL.all;
     ffff[14] = ECanaMboxes.MBOX14.MDL.all;
     ffff[15] = ECanaMboxes.MBOX15.MDL.all;

    }
}

//===========================================================================
// No more.
//===========================================================================
 

Fullscreen 5037.initial_slave.txt Download 
#include "DSP2803x_Device.h"     // DSP28 Headerfile Include File
#include "DSP2803x_Examples.h"   // DSP28 Examples Include File

//---------------------------------------------------------------------------
// InitECan:
//---------------------------------------------------------------------------
// This function initializes the eCAN module to a known state.
//

void caninitsalve(void)        // Initialize eCAN-A module
{
struct ECAN_REGS ECanaShadow;
    EALLOW;     // EALLOW enables access to protected bits
    ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
    ECanaShadow.CANTIOC.bit.TXFUNC = 1;
    ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;

    ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
    ECanaShadow.CANRIOC.bit.RXFUNC = 1;
    ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;

    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.SCB = 1;
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

/* Configure bit timing parameters for eCANA*/
    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.CCR = 1 ;            // Set CCR = 1
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

    // Wait until the CPU has been granted permission to change the configuration registers
    do
    {
      ECanaShadow.CANES.all = ECanaRegs.CANES.all;
    } while(ECanaShadow.CANES.bit.CCE != 1 );       // Wait for CCE bit to be set..

    ECanaShadow.CANBTC.all = 0;
    /* The following block is only for 60 MHz SYSCLKOUT. (30 MHz CAN module clock Bit rate = 1 Mbps
       See Note at end of file. */

    ECanaShadow.CANBTC.bit.BRPREG = 2;
    ECanaShadow.CANBTC.bit.TSEG2REG = 1;
    ECanaShadow.CANBTC.bit.TSEG1REG = 6;

    ECanaShadow.CANBTC.bit.SAM = 1;
    ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;


    ECanaMboxes.MBOX0.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX1.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX2.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX3.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX4.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX5.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX6.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX7.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX8.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX9.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX10.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX11.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX12.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX13.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX14.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX15.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX16.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX17.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX18.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX19.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX20.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX21.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX22.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX23.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX24.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX25.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX26.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX27.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX28.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX29.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX30.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX31.MSGCTRL.all = 0x00000000;

    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.CCR = 0 ;            // Set CCR = 0
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
    // Wait until the CPU no longer has permission to change the configuration registers
    do
    {
      ECanaShadow.CANES.all = ECanaRegs.CANES.all;
    } while(ECanaShadow.CANES.bit.CCE != 0 );       // Wait for CCE bit to be  cleared..
//`,',`,',`,',`,',`,',`,',`,',`,',`,',`,',`,',`,',`,',`,',`,',`,',


// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
//  as a matter of precaution.
///    ECanaRegs.CANTRR.all=0xffffffff;
///    do
///    {
///      ECanaShadow.CANTRS.all = ECanaRegs.CANTRS.all;
///    } while(ECanaShadow.CANTRS.all != 0 );       


    ECanaRegs.CANTA.all = 0xFFFFFFFF;   /* Clear all TAn bits */
    ECanaRegs.CANRMP.all = 0xFFFFFFFF;  /* Clear all RMPn bits */
    ECanaRegs.CANGIF0.all = 0xFFFFFFFF; /* Clear all interrupt flag bits */
    ECanaRegs.CANGIF1.all = 0xFFFFFFFF;

/* Disable all Mailboxes  */
    ECanaRegs.CANME.all = 0;        // Required before writing the MSGIDs

    // Mailboxs can be written to 16-bits or 32-bits at a time
    // Write to the MSGID field of TRANSMIT mailboxes MBOX0 - 15
    ECanaMboxes.MBOX0.MSGID.all = 0x81111110;
    ECanaMboxes.MBOX1.MSGID.all = 0x81111111;
    ECanaMboxes.MBOX2.MSGID.all = 0x81111112;
    ECanaMboxes.MBOX3.MSGID.all = 0x81111113;
    ECanaMboxes.MBOX4.MSGID.all = 0x81111114;
    ECanaMboxes.MBOX5.MSGID.all = 0x81111115;
    ECanaMboxes.MBOX6.MSGID.all = 0x81111116;
    ECanaMboxes.MBOX7.MSGID.all = 0x81111117;
    ECanaMboxes.MBOX8.MSGID.all = 0x81111118;
    ECanaMboxes.MBOX9.MSGID.all = 0x81111119;
    ECanaMboxes.MBOX10.MSGID.all = 0x8111111A;
    ECanaMboxes.MBOX11.MSGID.all = 0x8111111B;
    ECanaMboxes.MBOX12.MSGID.all = 0x8111111C;
    ECanaMboxes.MBOX13.MSGID.all = 0x8111111D;
    ECanaMboxes.MBOX14.MSGID.all = 0x8111111E;
    ECanaMboxes.MBOX15.MSGID.all = 0x8111111F;

    // Write to the MSGID field of RECEIVE mailboxes MBOX16 - 31
    ECanaMboxes.MBOX16.MSGID.all = 0x80000000;
    ECanaMboxes.MBOX17.MSGID.all = 0x80000001;
    ECanaMboxes.MBOX18.MSGID.all = 0x80000002;
    ECanaMboxes.MBOX19.MSGID.all = 0x80000003;
    ECanaMboxes.MBOX20.MSGID.all = 0x80000004;
    ECanaMboxes.MBOX21.MSGID.all = 0x80000005;
    ECanaMboxes.MBOX22.MSGID.all = 0x80000006;
    ECanaMboxes.MBOX23.MSGID.all = 0x80000007;
    ECanaMboxes.MBOX24.MSGID.all = 0x80000008;
    ECanaMboxes.MBOX25.MSGID.all = 0x80000009;
    ECanaMboxes.MBOX26.MSGID.all = 0x8000000A;
    ECanaMboxes.MBOX27.MSGID.all = 0x8000000B;
    ECanaMboxes.MBOX28.MSGID.all = 0x8000000C;
    ECanaMboxes.MBOX29.MSGID.all = 0x8000000D;
    ECanaMboxes.MBOX30.MSGID.all = 0x8000000E;
    ECanaMboxes.MBOX31.MSGID.all = 0x8000000F;

    // Specify that 8 bits will be sent/received
    ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX2.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX3.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX4.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX5.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX6.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX7.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX8.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX9.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX10.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX11.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX12.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX13.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX14.MSGCTRL.bit.DLC = 8;
    ECanaMboxes.MBOX15.MSGCTRL.bit.DLC = 8;

    // Configure Mailboxes 0-15 as Tx, 16-31 as Rx
    // Since this write is to the entire register (instead of a bit
    // field) a shadow register is not required.
    ECanaRegs.CANMD.all = 0x0000FFFF;

    // Enable all Mailboxes */
    // Since this write is to the entire register (instead of a bit
    // field) a shadow register is not required.
    ECanaRegs.CANME.all = 0xFFFFFFFF; 



//    EDIS;
}

//---------------------------------------------------------------------------
// Example: InitECanGpio:
//---------------------------------------------------------------------------
// This function initializes GPIO pins to function as eCAN pins
//
// Each GPIO pin can be configured as a GPIO pin or up to 3 different
// peripheral functional pins. By default all pins come up as GPIO
// inputs after reset.
//
// Caution:
// Only one GPIO pin should be enabled for CANTXA operation.
// Only one GPIO pin shoudl be enabled for CANRXA operation.
// Comment out other unwanted lines.



/* Note: Bit timing parameters must be chosen based on the network parameters such as
   the sampling point desired and the propagation delay of the network. The propagation
   delay is a function of length of the cable, delay introduced by the
   transceivers and opto/galvanic-isolators (if any).

   The parameters used in this file must be changed taking into account the above mentioned
   factors in order to arrive at the bit-timing parameters suitable for a network.
*/

//===========================================================================
// End of file.
//===========================================================================

 

  • 0
    Prodigy 10 points

    I think there is something wrong with your reception node. To complete transmitting, the reception node

    should fit the  transmition node.

  • 0 in reply to macready decker
    Prodigy 90 points

    how to use 24c02 by i2c inside of tms320 28035?

    i composed a writting function and a reading function by i2c.

    it is ok, if i write 1 byte data in it, then read it out .

    now, i write 10 bytes data, then read it out putting them in the size 10 array g[10]. the first data in the g[0] is always wrong.

    which good brother can solve it for me, please?

    and i put my program here, please exchange Filename Extensions into .c (not .txt)

    thanks

    Fullscreen 6215.tryi2c.txt Download 
    #include "DSP28x_Project.h"

struct text {
             char id;
             char howmany;//the number is pluged by 1(address)+how many data
             char info[3];// max is only 4
            }; 
void w(struct text *temp);
void r(struct text *temp);
struct text o={0x50},i={0x50};//={0x51,3,0,1,2},i;
char g[10];//={0};
int f[5];

interrupt void cpu_timer0_isr(void);



void main()
{
   InitSysCtrl();
   InitPieCtrl();
   InitPieVectTable();
   EALLOW;
   PieVectTable.TINT0 = &cpu_timer0_isr;
   InitCpuTimers();
   ConfigCpuTimer(&CpuTimer0, 60, 5000000);
   CpuTimer0Regs.TCR.all = 0x4001;
   IER |= M_INT1;
   PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
   EINT;   
   ERTM;

    EALLOW;
	GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0;    // Enable pull-up for GPIO28 (SDAA)
	GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0;	   // Enable pull-up for GPIO29 (SCLA)
    GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3;  // Asynch input GPIO28 (SDAA)
    GpioCtrlRegs.GPAQSEL2.bit.GPIO29 = 3;  // Asynch input GPIO29 (SCLA)
	GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 2;   // Configure GPIO28 for SDAA operation
	GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 2;   // Configure GPIO29 for SCLA operation

//-----------------------------------------------------
/*

   // Initialize I2C
   I2caRegs.I2CSAR = 0x0050;        // Slave address - EEPROM control code
   // I2CCLK = SYSCLK/(I2CPSC+1)
   #if (CPU_FRQ_40MHZ||CPU_FRQ_50MHZ)
     I2caRegs.I2CPSC.all = 4;       // Prescaler - need 7-12 Mhz on module clk
   #endif

   #if (CPU_FRQ_60MHZ)
     I2caRegs.I2CPSC.all = 6;       // Prescaler - need 7-12 Mhz on module clk
   #endif
   I2caRegs.I2CCLKL = 10;           // NOTE: must be non zero
   I2caRegs.I2CCLKH = 5;            // NOTE: must be non zero
   I2caRegs.I2CIER.all = 0x00;      // Enable SCD & ARDY interrupts

   I2caRegs.I2CMDR.all = 0x0020;    // Take I2C out of reset
                                    // Stop I2C when suspended

   I2caRegs.I2CFFTX.all = 0x6000;   // Enable FIFO mode and TXFIFO

   I2caRegs.I2CFFRX.all = 0x2040;   // Enable RXFIFO, clear RXFFINT,
*/



//    EALLOW;
//   I2caRegs.I2CSAR = 0x0050;		// Slave address - EEPROM control code
   I2caRegs.I2CPSC.all = 6;		    // Prescaler - need 7-12 Mhz on module clk
   I2caRegs.I2CCLKL = 10;			// NOTE: must be non zero
   I2caRegs.I2CCLKH = 5;			// NOTE: must be non zero
   I2caRegs.I2CIER.all = 0x24;		// Enable SCD & ARDY interrupts

   I2caRegs.I2CMDR.all = 0x0020;	// Take I2C out of reset
   									// Stop I2C when suspended

   I2caRegs.I2CFFTX.all = 0x6000;	// Enable FIFO mode and TXFIFO
   I2caRegs.I2CFFRX.all = 0x2040;	// Enable RXFIFO, clear RXFFINT,

 
//	while(1)
	{ 	
	o.id=0x50;// it is an account named by device
	o.howmany=3;// put the number of byte including how many byte you wanna send and how many byte of address..
	o.info[0]=0x0;//address inside of eeprom
	o.info[1]=0x1;
	o.info[2]=0x2;
	w(&o);
//      DELAY_US(10000);//required by eeprom.
	o.howmany=3;// put the number of byte including how many byte you wanna send and how many byte of address..
	o.info[0]=0x2;//address inside of eeprom
	o.info[1]=0x3;
	o.info[2]=0x4;
    w(&o);
//      DELAY_US(10000);//required by eeprom. 
//	o.id=0x50;
	o.howmany=3;
	o.info[0]=0x4;//address inside of eeprom
	o.info[1]=0x5;
	o.info[2]=0x6;
 	w(&o); 
//      DELAY_US(10000);//required by eeprom.
//	o.id=0x50;// it is an account named by device
	o.howmany=3;// put the number of byte including how many byte you wanna send and how many byte of address..
	o.info[0]=0x6;//address inside of eeprom
	o.info[1]=0x7;
	o.info[2]=0x8;
 	w(&o);
      DELAY_US(10000);//required by eeprom.
//	o.id=0x50;
	o.howmany=3;
	o.info[0]=0x8;//address inside of eeprom
	o.info[1]=0x9;
	o.info[2]=0xa;
 	w(&o); 
//      DELAY_US(10000);//required by eeprom.
//	o.id=0x50;
//	o.howmany=3;
//	o.info[0]=0xa;//address inside of eeprom
//	o.info[1]=0x19;
//	o.info[2]=0x1a;
// 	w(&o); 
//      DELAY_US(10000);//required by eeprom. 

//	i.id=0x50;
///	i.info[0]=0x0;//<----------===== if you exchange these two address, it is in right orer.
/// 	i.howmany=2;//            |
///	r(&i);//
//	g[0]=i.info[1];// it is | weild if you monitor this variable g.
//	g[1]=i.info[2];//      |
///      DELAY_US(3000);//  |
//	i.id=0x50;//         |  
//	i.info[0]=0x1;//<---|
//	i.howmany=2;
///	r(&i); 
///	g[0]=i.info[1];
///	g[1]=i.info[2];
///      DELAY_US(3000);//
///    f[0]=((i.info[2]<<8) + i.info[1]);

//	i.id=0x50;
	i.info[0]=0x0;//<----------===== if you exchange these two address, it is in right orer.
 	i.howmany=2;//            |
	r(&i);//                 | 
//	g[2]=i.info[1];// it is | weild if you monitor this variable g.
//	g[1]=i.info[2];//      |
//      DELAY_US(3000);//  |
//	i.id=0x50;//         |  
//	i.info[0]=0x3;//<---|
//   i.howmany=2;
	r(&i); 
	g[0]=i.info[1];
	g[1]=i.info[2];
//      DELAY_US(10000);// 
    f[0]=((i.info[2]<<8) + i.info[1]);

//	i.id=0x50;
	i.info[0]=0x2;//<----------===== if you exchange these two address, it is in right orer.
 	i.howmany=2;//            |
	r(&i);//                 | 
//	g[4]=i.info[1];// it is | weild if you monitor this variable g.
//	g[5]=i.info[2];//      |
//      DELAY_US(3000);//  |
//	i.id=0x50;//         |  
//	i.info[0]=0x5;//<---|
// 	i.howmany=2;
	r(&i); 
	g[2]=i.info[1];
	g[3]=i.info[2];
      DELAY_US(10000);// 
    f[1]=((i.info[2]<<8) + i.info[1]);

//	i.id=0x50;
	i.info[0]=0x4;//<----------===== if you exchange these two address, it is in right orer.
 	i.howmany=2;//            |
	r(&i);//                 | 
//	g[6]=i.info[1];// it is | weild if you monitor this variable g.
//	g[7]=i.info[2];//      |
//     DELAY_US(3000);//  |
//	i.id=0x50;//         |  
//	i.info[0]=0x7;//<---|
 //	i.howmany=2;
	r(&i); 
	g[4]=i.info[1];
	g[5]=i.info[2];
//      DELAY_US(3000);// 
    f[2]=((i.info[2]<<8) + i.info[1]); 

//	i.id=0x50;
	i.info[0]=0x6;//<----------===== if you exchange these two address, it is in right orer.
 	i.howmany=2;//            |
	r(&i);//                 | 
//	g[6]=i.info[1];// it is | weild if you monitor this variable g.
//	g[7]=i.info[2];//      |
//      DELAY_US(3000);//  |
//	i.id=0x50;//         |  
//	i.info[0]=0x7;//<---|
 //	i.howmany=2;
	r(&i); 
	g[6]=i.info[1];
	g[7]=i.info[2];
      DELAY_US(10000);// 
    f[3]=((i.info[2]<<8) + i.info[1]);


 	i.id=0x50;
	i.info[0]=0x8;//<----------===== if you exchange these two address, it is in right orer.
 	i.howmany=2;//            |
	r(&i);// 
//      DELAY_US(10000);
//    g[0]=i.info[1];
//    g[1]=i.info[2];

// 	i.id=0x50;
//	i.info[0]=0xee;//<----------===== if you exchange these two address, it is in right orer.
// 	i.howmany=2;//    
	r(&i); 

	g[8]=i.info[1];// it is | weild if you monitor this variable g.
	g[9]=i.info[2];//      |
//      DELAY_US(10000);//  |
    f[4]=((i.info[2]<<8) + i.info[1]);

///	i.id=0x50;//         |  
///	i.info[0]=0xcc;//<---|
/// 	i.howmany=2;
///	r(&i);

///    g[2]=i.info[1];
///	g[3]=i.info[2];
///      DELAY_US(10000);
//	i.id=0x50;//         |  
//	i.info[0]=0x4;//<---|
// 	i.howmany=2; 
//	r(&i); 
//      DELAY_US(10000);
//	g[2]=i.info[2];
//	g[3]=i.info[2];

	}


}

void w(struct text *temp)
{
// usage: 	o.id=0x50;      <--- at first, give account of the device.
//	        o.howmany=3;    <--- 1+how many byte you wanna put into memory. the max is two.
//	        o.info[0]=0x28; <--- put the address inside of memory in the o.info[0]
//	        o.info[1]=0x9;  <--- put the data you wanna put into the memory in o.info[0] and o.info[1]
//   	    o.info[2]=0xa;


   char s;

   if ((I2caRegs.I2CMDR.bit.STP == 1) || (I2caRegs.I2CSTR.bit.BB == 1))
   {
      return ;
   }

   I2caRegs.I2CSAR = temp->id;   // Setup slave address
   I2caRegs.I2CCNT = temp->howmany+1;   // plus 1 because of id.

// for (i=0; i<msg->NumOfBytes-2; i++)
   for (s=0; s < temp->howmany+1; s++)
   {
      I2caRegs.I2CDXR = *(temp->info+s);
   }

   // Send start as master transmitter
   I2caRegs.I2CMDR.all = 0x6E20;
      DELAY_US(3000);
}

void r(struct text *temp)
{
// usage: 	i.id=0x50;       <--- at first, give account of the device.
//	        i.info[0]=0x28;  <--- put the address inside of memory into info[0] where you wanna start fetching
//      	i.howmany=2;     <--- how many data byte you wanna fatch. the max munber is two.
//       	r(&i);           <--- the two byte data will be put in the i.info[1] and i.info[2]. and the i.info[0] will be put address that you started fetching.


   char s;
   if ((I2caRegs.I2CMDR.bit.STP == 1) || (I2caRegs.I2CSTR.bit.BB == 1))
   {
      return ;
   }

   I2caRegs.I2CSAR = temp->id;
   I2caRegs.I2CDXR = temp->info[0];//info[0] is the address inside of eeprom.
   I2caRegs.I2CCNT = 1;
   I2caRegs.I2CMDR.all = 0x2620;			// Send data to setup EEPROM address

   while(I2caRegs.I2CSTR.bit.ARDY !=1);
   I2caRegs.I2CSTR.bit.ARDY = 1;

   I2caRegs.I2CCNT = temp->howmany;    // Setup how many bytes to expect
   I2caRegs.I2CMDR.all = 0x2C20;         // Send restart as master receiver
   
   for(s=0; s < temp->howmany; s++)
   {
       temp->info[s+1] = I2caRegs.I2CDRR;
   }

    while(I2caRegs.I2CSTR.bit.SCD !=1);
    I2caRegs.I2CSTR.bit.SCD = 1;
      DELAY_US(3000);
}


interrupt void cpu_timer0_isr(void)
{
//	o.id=0x51;// it is an account named by device
//	o.howmany=3;// put the number of byte including how many byte you wanna send and how many byte of address..
//	o.info[0]+=1;//address inside of eeprom
//	o.info[1]+=1;
//	o.info[2]+=1;
//w(&o);

   // Acknowledge this interrupt to receive more interrupts from group 1
   PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}

  • 0 in reply to macready decker
    Prodigy 90 points

    thanks a lot, it is ok now. yesterday my friend tried it again, and ask me if you put their ground together. it is the answer.

    my friend solve it yesterday. thank you a million.

    and i got another problem about i2c, would you please help me?