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CCS/TMS320F28379D: driverlib file register not found in the datasheet

Part Number: TMS320F28379D


Tool/software: Code Composer Studio

Hi All,

I did not understand form the driverlib file few function and declaration.

static inline SPI_RxFIFOLevel
SPI_getRxFIFOStatus(uint32_t base)
{
//
// Check the arguments.
//
ASSERT(SPI_isBaseValid(base));

//
// Get the current FIFO status
//
return((SPI_RxFIFOLevel)((HWREGH(base + SPI_O_FFRX) & SPI_FFRX_RXFFST_M) >>SPI_FFRX_RXFFST_S));
}

Can anyone share the details about bold mark register and bits.

"SPI_O_FFRX) & SPI_FFRX_RXFFST_M) >>SPI_FFRX_RXFFST_S));"

If I want to make the same function using device_support library then which bits I should check here to make similar function.

  • Hi All,

    Good Day!

    ..............Continue to the previous post for detail understanding....................

    Please can anyone share detail meaning of this statement:

    ((HWREGH(base + SPI_O_FFRX) & SPI_FFRX_RXFFST_M) >>SPI_FFRX_RXFFST_S));   

     

    1. (base + SPI_O_FFRX) ------what is used and what is this statement

    2. SPI_FFRX_RXFFST_M) >>SPI_FFRX_RXFFST_S-----What does mean by this statement

    3. (base + SPI_O_FFRX) & SPI_FFRX_RXFFST_M) >>SPI_FFRX_RXFFST_S))------What will be final output of this statement in conditions.

    Can anyone help me, to make the same function using device_support library (bit wise library)

    static inline SPI_RxFIFOLevel
    SPI_getRxFIFOStatus(uint32_t base)
    {
    //
    // Check the arguments.
    //
    ASSERT(SPI_isBaseValid(base));

    //
    // Get the current FIFO status
    //
    return((SPI_RxFIFOLevel)((HWREGH(base + SPI_O_FFRX) & SPI_FFRX_RXFFST_M) >>SPI_FFRX_RXFFST_S));
    }

    if I want to create the same function using device_support library then how can be make. I am little bit not clear about (base+SPI_O_FFRX)

    (SPIA_BASE) 0x00006100U + (SPI_O_FFRX) 0xBU =  0x0000610BU // Final value of this statement.

    why this values is & with SPI_FFRX_RXFFST_M and why it is right shifted?

    If I want make same then how can be make using device_support library.

    --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

    Something like below statement I was trying but could understand the completely due to that could not make complete function.

    static inline SPI_RxFIFOLevel SPI_getRxFIFOStatus(uint32_t base)
    {
    //
    // Get the current FIFO status
    //
    // return((SPI_RxFIFOLevel)((HWREGH(base + SPI_O_FFRX) & SPI_FFRX_RXFFST_M) >> SPI_FFRX_RXFFST_S));


    return((SPI_RxFIFOLevel)(SpiaRegs.SPIFFRX.bit.RXFFST));    //Master slave kind of combination could not found in the device_support.
    }

    ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

    Help someone who has practical experience on this.

  • Hi Dnyanesh,

    Driverlib provides macros for register offsets and fields inside each of these registers

    SPI_O_FFRX is the macro with the offset of the register SPIFFRX. This is just an offset from the base address. So, in order to access this register you need to use it along with SPI base addresses:

    For accessing SPIA FFRX register -> HWREG(SPIA_BASE + SPI_O_FFRX)

    SPI_FFRX_RXFFST_M and SPI_FFRX_RXFFST_S are macros used to access the field RXFFST in the register SPIFFRX. _M macro provides the Mask for that field and _S macro provides the Shift value, i e the bit position.

    So to read the RXFFST field in FFRX register in SPIA -> (HWREG(SPIA_BASE + SPI_O_FFRX) & SPI_FFRX_RXFFST_M) >> SPI_FFRX_RXFFST_S

    Using bit field structs -> SpiaRegs.SPIFFRX.bit.RXFFST

    Hope this answers your question

    Regards,

    Veena

  • Hi Veena,

    Good Day!

    Stay safe and healthy.

    Thanks for your reply. Exactly I have also done the same thing using bits field structure register parameters, but in few place I was not sure what exactly it is expected. 

    In this case--- return((SPI_RxFIFOLevel)(SpiaRegs.SPIFFRX.bit.RXFFST));    //Master slave kind of combination could not found in the device_support.

    (SPI_RxFIFOLevel)- this is I want to understand RxFIFOLevel is required or not in return?

  • Hi Veena,

    One thing I noticed in the same functions that ----SPI_FFRX_RXFFST_M) >> SPI_FFRX_RXFFST_S

    I have used the same, but after reading the whole functionality I am little bit confused on RXFFST. whether I should add return ((SPI_RxFIFOLevel)

    (SpiaRegs.SPIFFRX.bit.RXFFST )) or return((SPI_RxFIFOLevel)(SpiaRegs.SPIFFRX.bit.RXFFIL));

    There are two things

    1) (SPI_RxFIFOLevel) should I add or not

    2) should I used SpiaRegs.SPIFFRX.bit.RXFFIL or SpiaRegs.SPIFFRX.bit.RXFFST

    I am not clear.

  • HiDnyanesh,

    1) (SPI_RxFIFOLevel) should I add or not

    It is up to you. In driverlib, we typecast it to an enum so that it is easier to read. The values will be  SPI_FIFO_RXEMPTY, SPI_FIFO_RX1, SPI_FIFO_RX2 etc.

    If you are not using the enum and return the value as is, you would get values like 0,1,2,3 etc.

    2) should I used SpiaRegs.SPIFFRX.bit.RXFFIL or SpiaRegs.SPIFFRX.bit.RXFFST
    RXFFST is the status of the FIFO and RXFFIL is what you configure as the FIFO length for which an interrupt needs to be generated. For more details, please read the register description in the device Technical Reference Manual
    Regards,
    Veena
  • Hi Veena,

    Good Day!

    Thanks for your email.

    Point number 1 I understood that whatever is updated value is there, that will be return.

    Reference to my previous post as below:

    static inline SPI_RxFIFOLevel
    SPI_getRxFIFOStatus(uint32_t base)
    {
    //
    // Check the arguments.
    //
    ASSERT(SPI_isBaseValid(base));

    //
    // Get the current FIFO status
    //
    return((SPI_RxFIFOLevel)((HWREGH(base + SPI_O_FFRX) & SPI_FFRX_RXFFST_M) >>SPI_FFRX_RXFFST_S));
    }

    I am not clear about above function, Can you tell me if I want to replace above function with device_support drivers what would be new function?

  • Hi,

    Please use the following function:

    static inline SPI_RxFIFOLevel
    SPI_getRxFIFOStatus(volatile struct SPI_REGS *SpiRegs)
    {
    	//
    	// Get the current FIFO status
    	//
    	return((SPI_RxFIFOLevel)SpiRegs->SPIFFRX.bit.RXFFST);
    }

    where SpiRegs is a pointer to the register structure.

    Regards,

    Veena

  • Hi Veena,

    Good Day!

    Thanks for your reply. I have made the same function what you have suggested. I hope it should work as expected.

    I will test and update your the result.

  • Hi Veena,

    Good Day!

    Thanks for shared details. I hope this will work in the application as I can not check now with system.

  • Hi Veena,

    Please I have prepared the below function with respect to driverlib functions. Please review below functions and let me know if any changes required in any function.I have doubt on Busy function and all other should be correct but still review.

    ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
    static inline void SPI_resetRxFIFO(uint32_t base)
    {
    //
    // Reset the RX FIFO.
    //
    // HWREGH(base + SPI_O_FFRX) &= ~SPI_FFRX_RXFIFORESET;
    // HWREGH(base + SPI_O_FFRX) |= SPI_FFRX_RXFIFORESET;

    SpiaRegs.SPIFFRX.bit.RXFIFORESET = ~1; //D13 bit
    SpiaRegs.SPIFFRX.bit.RXFIFORESET = 1; //D13 bit
    }

    ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

    static inline void SPI_resetTxFIFO(uint32_t base)
    {
    // //
    // // Check the arguments.
    // //
    // ASSERT(SPI_isBaseValid(base));
    //
    // //
    // // Reset the TX FIFO.
    // //
    // HWREGH(base + SPI_O_FFTX) &= ~SPI_FFTX_TXFIFO;
    // HWREGH(base + SPI_O_FFTX) |= SPI_FFTX_TXFIFO;

    SpiaRegs.SPIFFTX.bit.TXFIFO = ~1; //D13 bit
    SpiaRegs.SPIFFTX.bit.TXFIFO = 1; //D13 bit
    }

    ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

    static inline void SPI_writeDataNonBlocking(uint32_t base, uint16_t data)
    {
    //
    // Write data to the transmit buffer.
    //
    // HWREGH(base + SPI_O_TXBUF) = data;

    SpiaRegs.SPITXBUF = data;
    }

    ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

    static inline uint16_t SPI_readDataNonBlocking(uint32_t base)
    {
    //
    // Check for data to read.
    //
    // return(HWREGH(base + SPI_O_RXBUF));

    return(SpiaRegs.SPIRXBUF);
    }

    ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

    static inline SPI_RxFIFOLevel SPI_getRxFIFOStatus(uint32_t base)
    {
    //
    // Get the current FIFO status
    //
    // return((SPI_RxFIFOLevel)((HWREGH(base + SPI_O_FFRX) & SPI_FFRX_RXFFST_M) >> SPI_FFRX_RXFFST_S));
    // return((SPI_RxFIFOLevel)(SpiaRegs.SPIFFRX.bit.RXFFIL));

    return((SPI_RxFIFOLevel)(SpiaRegs.SPIFFRX.bit.RXFFST));
    }

    ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

    static inline bool SPI_isBusy(uint32_t base)
    {
    //
    // Determine if the SPI is busy.
    //
    // return((HWREGH(base + SPI_O_FFTX) & SPI_FFTX_TXFFST_M) != 0U);

    return((SpiaRegs.SPIFFTX.bit.TXFFST) != 0U); //Added on 04/06/2020
    // return((SpiaRegs.SPIFFTX.bit.TXFFIL) != 0U); //Added on 06/06/2020
    }
    ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

  • Hi Dnyaneshwar,

    Instead of ~1, I would recommend having 0 because ~1 = 0xFFFFFFFE.

    When you write to the entire register please use the ".all" bit. SpiaRegs.SPITXBUF.all instead of SpiaRegs.SPITXBUF

    All these functions are configuring or returning status of SPIA. Hence there is no need to send the base parameter.

    Regards,

    Veena

  • Hi Veena,

    Good Day!

    Thanks for reply. I thing ~1 will not impact as this is bit compliment which I have used, If I am going for byte/word/double then it will impact, however your suggestion is correct for code implementation and code security.

    I hope you have checked all the functions and all are correct. Still Please check return statement of the below function.

    static inline bool SPI_isBusy(uint32_t base)
    {
    //
    // Determine if the SPI is busy.
    //
    // return((HWREGH(base + SPI_O_FFTX) & SPI_FFTX_TXFFST_M) != 0U);

    return((SpiaRegs.SPIFFTX.bit.TXFFST) != 0U); //Added on 04/06/2020
    // return((SpiaRegs.SPIFFTX.bit.TXFFIL) != 0U); //Added on 06/06/2020
    }

  • Hi Dnyanesh,

    return((SpiaRegs.SPIFFTX.bit.TXFFST) != 0U); looks correct to me.

    Again, the same comment as I mentioned in the previous reply. All the functions are setting SPIA registers only. So, having base as parameter might be confusing. I would recommend removing that parameter.

    Regards,

    Veena

  • Hi Dnyanesh,

    Can you let us know why you are not using the driverlib functions and creating similar functions using bitfields approach?

    Regards,

    Veena

  • Hi Veena,

    Good Day!

    Thanks for your reply. 

    Answer to your question. If you remember in the March 2020 I had raised the ticket for IPC communication and SPI interface. SPI causing an error when the PWM interrupt is enable. SPI and XINT both are not working due to some issue. I have tried at that time with system but later due to lock down I could not able do much testing to analyse these issue.

    I have already written a application code with driverlib but at very last stage I have found this issue and did not got the solution the I ported all the peripherals to device_support library. This is the only reason I am making the functions which are already used in the application with SPI communication.

    I hope you will understand what is the reason I am making these functions.

  • HI Veena,

    Thanks for your reply and clarification.

    I hope these all the functions should work perfectly in the application code. This is my expectation. Lets see the result at the time of system testing. If not working I will inform you.