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Tool/software: Code Composer Studio
Hi
I am meeting an issue that as below show, CLAdiv can't get the right output, and get right output after adding one statement before the CLAdiv.
Below link is the software code, pls help analyze what is the root cause for this issue.
Thanks.
/cfs-file/__key/communityserver-discussions-components-files/171/DSP28035_5F00_App.rar
Hardy,
The compiler version is quite old. See if the issue still exists with more recent tools. If the issue is still seen, provide a screenshot of the disassembly for each case.
Regards
Lori
Hardy,
I compared assembly for 6.4.2 with/without commented out lines as well as 19.6.0.STS but I cannot see any differences.
Also, I do not have access to a 28035 board. I tried converting the project to 28379, however, I'm getting errors with loading. So I am unable to reproduce their issue and therefore cannot do any debugging.
I reviewed bug fixes for CLA and did not see anything obvious, however, there have been several bug fixes to later releases.
Are you able to do more testing for other releases than 19.6.0.STS (which you indicated did not have the issue).
That would help narrow down when the bug might have been fixed. Would be useful to at least see if the final 6.4.12 release already has a fix.
Also, without a reproduceable test case, I cannot do any debug testing.
Regards,
Greg
Hardy,
For above issue, a bug was found during 2017 CLA performance improvement work.
sir.ext.ti.com/.../EXT_EP-8463
Above bug was fixed in:
15.12.7.LTS, 16.9.6.LTS, and 17.9.0.STS (and all future releases)
For below CLAdiv() example, the result of CLAdiv call is -99.999 instead of 99.999
#pragma CODE_SECTION(Cla1Task1, "Cla1Prog");
__interrupt void Cla1Task1 ( void )
{
EPwm7Regs.TBCTR = 0;
uiBeginCnt = EPwm7Regs.TBCTR;
flt = CLAdiv(600.0,6.0);
}
The bug is due to missing an extra instruction (or MNOP) below:
00009000 _Cla1Task1:
...
00009010 0000 MMOVIZ MR0, #0x0
00009011 7840
00009012 6984 MMOV16 0x6984, MR0
00009013 75c0
00009014 0000 MNOP
00009015 7fa0
00009016 0000 MNOP ---- need 1 more MNOP between above store to memory and below read from same memory
00009017 7fa0
00009018 6984 MMOVZ16 MR0, 0x6984
00009019 7580
0000901a 8c80 MMOV16 0x8c80, MR0
0000901b 75c0
For customers using older 6.4.x release, one way to look for the bug would be to build their cla files with 15.12.6.LTS (which has the bug) and then also build with 15.12.7.LTS (which fixes bug).
Then compare the assembly for both. Only need to look at differences around memory stores followed by load from same memory location. Then add enough __mnop() intrinsics to ensure there are at least 3 instructions between write and read from same memory location.
Thanks
Greg