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LAUNCHXL-F280049C: Very very strange behavior for ADC result values.

venkatesh chilapur
Mastermind 6460 points
Part Number: LAUNCHXL-F280049C

Hi all,

I've a very strange problem.

I am trying to model a current control application in MATLAB/Simulink which at the basic level consists of an ePWM block running at 200KHZ switching frequency.

At the end of the period, it triggers a SOC event and I've 3 ADC blocks which perform conversion on this event.

Here is the issue:

When I generate code from MATLAB the first time and import this code in CCS and run, I see the ADC result register stuck at 4095.

Even if I change the plant input voltage or drive a duty cycle in open loop, I see no impact.

Then I do this:

Now I run the TI application code for PCMC and observe the ADC value.

It works perfectly fine and I can see the change to ADC result register inline with change in input voltage.

Now I do this:

I go back now to the MATLAB generated code and run the code.

Surprisingly, the non-working code starts to work and behaves exactly like the TI application.

My question is:

What is the TI application code doing which is actually enabling my application to run properly.

Note: If I power-cycle the board, the issue returns.

So it is something to do with TI application code and some state it put the controller such that things work.

Any inputs would be very helpful.

  • 0
    TI__Guru 62975 points

    Venkatesh,

    I'd recommend comparing the read-back values of the configuration registers of the AnalogSubsysRegs and AdcXRegs between your MATLAB generated code vs the TI example.  It might have to do with some ADC reference settings.

    -Tommy

  • 0 in reply to tlee
    Mastermind 6460 points

    Hi Tommy,

    Thank you for your inputs.

    I just realized one difference in the settings that actually is making the difference.

    But can you help me understand how this matters?

    The bit  AnalogSubsysRegs->ANAREFCTL->ANAREFB2P5SEL is zero in case of TI application.

    I wasn't using the ADC-B module. Hence this bit remained '1' in my case(reset value is 1).

    It turns out when I am able to re-produce this problem (multiple times in a row), adding just one ADC block to the model which is configured for module B just to ensure the ANAREFB2P5SEL is zero, makes my model work again(I can read the proper plant values).

    Any idea why this bit which is related to ADC Module B, has an impact on the ADC result register values on ADC module C or A?

  • 0 in reply to venkatesh chilapur
    TI__Guru 62975 points

    Venkatesh,

    The pin count restrictions of the device led to the sharing of analog VREF pins between ADCs:

    In order to avoid potential pin contention between Internal vs External reference modes between ADCs, logic was added to to enforce equal settings across ADCs with shared VREF pins.  The internal reference will not work if the ANAREFCTL modes are configured to different values:

    -Tommy