Hi expert,
My customer is using CMPSS and DC/TZ module of EPWM to designing their digital power application. They hope to trip PWM output to low when CMPSS output hgih.
The issue they met is sometimes this function can go wrong. As shown below, when CMPSS output is released, PWM is still in low state without recovery from low state which is unwanted.
I hope to monitor some register values in control loop and give them outputed with a DAC, but I am not sure which register sets are good to watch here. Could you give me any ideas here?
Thanks
Sheldon
Green line channel is EPWM output B
Blue line is CMPSS output signal (though XBAR for debugging purpose)