TMS320F28388D: Microcontroller TRM (rev.B) - DMA State Diagram error?

Hi,

When comparing the DMA State Diagram published in the F2838x TRM (rev.B), and the same diagram in the current DMA documentation of the TMS320F28335, I see one important difference.
The interrupt to the CPU at begining of a transfer is generated at different moments. In F2838x it is generated BEFORE the shadow register copy, and in the case of F2833x AFTER the copy.
I think this is an error in the F2838x TRM DMA State Diagram, and it should be like in the older part TRM. Please confirm.

Best regards,

Andy