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TIDM-1000: three-phase Vienna

Part Number: TIDM-1000


Whether SVPWM modulation is adopted in the control method of three-phase Vienna control board

  • Hi,

    No, it is not adopted.

    Regards,

    Chen

  • When I saw the current collection in the SDK program, in addition to OPA4350UA, I also used the SDFM module to collect the current. Excuse me, why do I use two current collection modules

  • This is just to provide another option. The default is to use ADC for sampling.

    Regards,

    Chen

  • In ccs10 debugging three-phase Vienna board, EPMW1 Regs.TZFLG What does 0x0004 represent? The operation manual is set in Vienna_ After cleartrip input 1 clears the PWM trip, the EPWM1 Regs.TZFLG To 0x0000, what does this mean?


    Before this input 1 clears the PWM trip, EPWM1 Regs.TZFLG 0x0004, when the input voltage is 120V, the output bus voltage is 320v
    After this input 1 clears the PWM trip,  EPWM1 Regs.TZFLG Is 0x0000, when the input voltage is 120V, the output bus voltage is 600V

    Why is the output bus voltage different after clearing the trip? What is the principle?

  • Another question:

    How to deal with the duty cycle of dut1ypu input during the current loop debugging? Put duty1pu and PWM_ Period multiplication is assigned to duty1, which is used as modulation wave and triangular wave epwm_ COUNTER_ COMPARE_ A compare the output PWM?
    Which base1, what is this? Modulation wave? Or the last PWM output?

    The corresponding procedures are as follows

    // EPWM_setCounterCompareValueOptimized()
    //
    static inline void VIENNA_HAL_EPWM_setCounterCompareValueOptimized(
    uint32_t base,
    EPWM_CounterCompareModule compModule,
    uint16_t compCount)
    {
    uint32_t registerOffset;

    //
    // Get the register offset for the Counter compare
    //
    registerOffset = EPWM_O_CMPA + (uint16_t)compModule;

    //
    // Write to the counter compare registers.
    //
    #pragma diag_suppress = 770
    #pragma diag_suppress = 173
    if((compModule == EPWM_COUNTER_COMPARE_A) ||
    (compModule == EPWM_COUNTER_COMPARE_B))
    {
    //
    // write to CMPA or COMPB bits
    //
    HWREGH(base + registerOffset + 1) = compCount;
    }
    else
    {
    //
    // write to COMPC or COMPD bits
    //
    HWREGH(base + registerOffset) = compCount;
    }
    #pragma diag_warning = 770
    #pragma diag_warning = 173
    }

    //
    // updateInverterPWM()
    //
    static inline void VIENNA_HAL_updatePFCviennaPWM(uint32_t base1, uint32_t base2,
    uint32_t base3, float32_t duty1PU,
    float32_t duty2PU, float32_t duty3PU)
    {
    float32_t pwm_period;
    uint16_t duty1, duty2, duty3;

    pwm_period = (float32_t)(VIENNA_PFC3PH_PWM_PERIOD / 2.0);

    duty1 = (uint16_t) ( (float32_t) pwm_period * (float32_t) fabsf(duty1PU) );
    duty2 = (uint16_t) ( (float32_t) pwm_period * (float32_t) fabsf(duty2PU) );
    duty3 = (uint16_t) ( (float32_t) pwm_period * (float32_t) fabsf(duty3PU) );

    VIENNA_HAL_EPWM_setCounterCompareValueOptimized(base1,
    EPWM_COUNTER_COMPARE_A,
    duty1);

    VIENNA_HAL_EPWM_setCounterCompareValueOptimized(base2,
    EPWM_COUNTER_COMPARE_A,
    duty2);

    VIENNA_HAL_EPWM_setCounterCompareValueOptimized(base3,
    EPWM_COUNTER_COMPARE_A,
    duty3);

    }

    The following functions are called in the main function.

    VIENNA_duty1PU = ( (VIENNA_gi_out1
    + VIENNA_inductor_voltage_drop_feedforward1
    + VIENNA_v1Meas_pu
    - VIENNA_thirdHarmonicInjection
    ) / VIENNA_vBusHalfMeas_pu ) - VIENNA_gs_out;

    VIENNA_duty2PU = ( (VIENNA_gi_out2
    + VIENNA_inductor_voltage_drop_feedforward2
    + VIENNA_v2Meas_pu
    - VIENNA_thirdHarmonicInjection
    ) / VIENNA_vBusHalfMeas_pu ) - VIENNA_gs_out;


    VIENNA_duty3PU = ( (VIENNA_gi_out3
    + VIENNA_inductor_voltage_drop_feedforward3
    + VIENNA_v3Meas_pu
    - VIENNA_thirdHarmonicInjection
    ) / VIENNA_vBusHalfMeas_pu ) - VIENNA_gs_out;

    VIENNA_HAL_updatePFCviennaPWM(VIENNA_HIGH_FREQ_PWM1_BASE,
    VIENNA_HIGH_FREQ_PWM2_BASE,
    VIENNA_HIGH_FREQ_PWM3_BASE,
    VIENNA_duty1PU,
    VIENNA_duty2PU,
    VIENNA_duty3PU);

  • Vienna_ cleartrip is just to clear the trip zone flag(TZFLG) to enable the PWM output. 

    The difference is whether you have PWM output enabled. If not, it behaves like a traditional three phase rectifier with diode bridges.

    Regards,

    Chen

  • You could search for VIENNA_HAL_updatePFCviennaPWM

    Base 1 in the function:    #define VIENNA_HIGH_FREQ_PWM1_BASE                 EPWM1_BASE

    I think your understanding is correct. 

    Regards,

    Chen

  • VIENNA_HAL_updatePFCviennaPWM (VIENNA_HIGH_FREQ_PWM1_BASE,VIENNA_HIGH_FREQ_PWM2_BASE,VIENNA_HIGH_FREQ_PWM3_BASE,VIENNA_duty1PU,VIENNA_duty2PU,VIENNA_duty3PU);

    static inline void VIENNA_HAL_updatePFCviennaPWM(uint32_t base1, uint32_t base2,uint32_t base3, float32_t duty1PU,float32_t duty2PU, float32_tduty3PU)
    {
    float32_t pwm_period;
    uint16_t duty1, duty2, duty3;

    pwm_period = (float32_t)(VIENNA_PFC3PH_PWM_PERIOD / 2.0);

    duty1 = (uint16_t) ( (float32_t) pwm_period * (float32_t) fabsf(duty1PU) );
    duty2 = (uint16_t) ( (float32_t) pwm_period * (float32_t) fabsf(duty2PU) );
    duty3 = (uint16_t) ( (float32_t) pwm_period * (float32_t) fabsf(duty3PU) );

    VIENNA_HAL_EPWM_setCounterCompareValueOptimized(base1,EPWM_COUNTER_COMPARE_A,duty1);

    VIENNA_HAL_EPWM_setCounterCompareValueOptimized(base2,EPWM_COUNTER_COMPARE_A,duty2);

    VIENNA_HAL_EPWM_setCounterCompareValueOptimized(base3,EPWM_COUNTER_COMPARE_A,duty3);

    For Vienna_ HAL_ EPWM_ Setcountercomparevalueoptimized function. Is the function executed as shown in the figure below?

    The update PWM program is as above. Is my understanding right?

  • Hi,

    I think the waveform looks fine but your note is not accurate. For more detailed information, please check figure 4 in the user guide. You could also check PWM module in TRM to understand how counter and comparator work.

    Regards,

    Chen