TMS320F28379D: Configure interrupts for SCI in CPU1 and use SCI in CPU2

Hi,

Not sure why you want to setup interrupt on CPU1 when SCI is assigned to CPU2 but interrupt are triggered on both the CPU so you just need to enable SCI interrupt on CPU1 PIE and map the interrupt handler in vector table to have it working.

Please refer SCI example in C2000Ware to see how to setup the interrupts.

Regards,

Vivek Singh

Hi Vivek Singh,

Thank you so much for your reply. Actually, we would like to use SCI in CPU2 and want to know if we need assign SCI to CPU2 in CPU1.

We have assigned SCI to CPU2 in CPU1 with the following code and configure corresponding interrupts

EALLOW;
DevCfgRegs.CPUSEL5.bit.SCI_C = 1;
EDIS;

and configure corresponding interrupts in CPU2 with the following code:

EALLOW;
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
PieVectTable.SCIC_RX_INT = &Receive; 
PieVectTable.SCIC_TX_INT = &Send;
EDIS;

SCI still can no work.

If we want to use SCI in CPU2, we need to configure corresponding GPIOs in CPU1 then assign to CPU2 or directly in CPU2?

Thanks.

Dear Vivek Singh,

Thank you so much for your reply. I will try again and it should work.

Sincerely,

Lizhi