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TMS320F28335: eCAN

Anu B
Intellectual 335 points

Part Number: TMS320F28335

Hello,

1. In some of the examples, the following registers are cleared as follows:

ECanaShadow.CANTRS.all = 0; 

ECanaShadow.CANTA.all = 0;

Though I understand that this is to prevent any other bits that might be set from getting cleared while copying to the original register, but as per the datasheet writes of 0 to these two registers have no effect. So this applies for shadow register also right?

 

2.  If the writes of 0 are supposed to have an effect on the shadow register by setting them to 0, then I am not able to understand the significance of doing this:

Line 1: ECanaShadow.CANTA.all = 0;
Line 2: ECanaShadow.CANTA.bit.TA25 = 1; // Clear TA5
Line 3: ECanaRegs.CANTA.all = ECanaShadow.CANTA.all;

So since the bits are supposed to be cleared in line 1 itself, then what is the significance of clearing it again by writing 1 to it in line2?

Regards,

Anu

  • 0
    TI__Guru* 95315 points

    The shadow “register” is not a register. It is just a RAM location. We clear the RAM location to prevent inadvertent clearing of unintended bits. Your understanding is correct, from that perspective. 

    So since the bits are supposed to be cleared in line 1 itself, then what is the significance of clearing it again by writing 1 to it in line2?

    Line 1 clears the RAM location

    Line 2 sets only bit 25, again in the RAM location

    Only in line 3 when the shadow value is copied to the actual register, is the TA25 bit is the register gets cleared.

    You can look at the disassembly to get a better understanding.