Hi TI Friends;
I want to ask some question about TMS320F28069PZT;
See below, peripheral definitions of TMS320F28069 are different from other DSP. VREFHI and ADCINA0 reuse one foot, which has the following questions.
1) Datasheet show that VREFHI and ADCINA0 of 80-PIN TMS320F28069 PN and PFP Reuse one foot. Is 100-pin TMS320F28069PZT also multiplexed?
But the actual test found that 100-PIN TMS320F28069PZT VREFHI and ADCINA0 connected to different analog circuit sampling will have problems.
2) DSP internal VREFHI and ADCINA0 are short connected? If the peripheral VREFHI is connected to the external reference voltage of 3V,
shall ADCINA0 also be shorted to 3V together, or to GND by shorting 1K resistance? Is there any DSP internal principle schematic reference?
3) VREFHI and ADCINA0 reuse one foot, Is there a process in the internal software that requires special attention?
