TMS320F28377D: DSP Propagation Delay Questions

Hi,

Michael David said:

I found table 5-60 that mentions delay time of 25ns. Is this the DSP delay from input to output for any given GPIO pin or channel?
Am I correct to assume the propagation delay is due to any gates the signal has to go through and line length?

This delay is the delay in case you are using PWM trip function.
If a certain GPIO is used as a trip input - this parameter indicates Delay time, trip input active to PWM Hi-Z (or any forced state).
This is unrelated to the dead time.
This delay is due to the logic from detecting the trip input, applying force action on the PWM output and other propagation delays on chip.

Michael David said:

Does the DSP resolution play a role in the overall propagation delay in the DSP?

1. If so, how does DSP delay differ from DSP resolution delay?

2. Am I correct to assume resolution is based on how high the clock frequency is to determine where the signal is set based on logic.

For the dead time you would be using the dead band sub-module to insert the deadtime needed.
The complimentary outputs of a PWM are closely matched in skews. It doesn't vary w.r.t. resolution of PWM output.

Resolution up to system clock is achieved by using the clocking method, and finer resolution beyond system clock is achieved using other means.
Details of the same are in the High-resolution PWM chapter of the device technical reference manual.

Hello,

Sorry for the late reply. So if we are not using the GPIO pin as a trip input then the 25ns will not be an accurate representation of prop delay, is that correct? So what I should be using is the High-resolution PWM chapter to get a better idea of the delay, is that correct?

Hello,

Your saying regardless of normal PWM (trip function) or high resolution PWM, the 25ns prop delay is still valid, is that correct?