Tool/software: Code Composer Studio
Dear support team:
Hello, I want to know how to judge the rising edge and falling edge of the ecap module.
Will the rising and falling edges of the circled part like the following picture be captured by ecap?
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Tool/software: Code Composer Studio
Dear support team:
Hello, I want to know how to judge the rising edge and falling edge of the ecap module.
Will the rising and falling edges of the circled part like the following picture be captured by ecap?
Hi,
No, the circled parts seem to be the spikes over existing signal. They do not effect ECAP operation.
ECAP will detect transition when signal changes state from 0 to 1 or 1 to 0 depending on the configuration.
hi,
The two signals in the figure are the signals of A phase and B phase of INC encoder. I use two ECAP modules to capture the two signals. The configuration is as follows:
ECap1Regs.ECCTL1.bit.CAP1POL = 0; //rising
ECap1Regs.ECCTL1.bit.CAP2POL = 1; //fall
ECap1Regs.ECCTL1.bit.CAP3POL = 0; //rising
ECap1Regs.ECCTL1.bit.CAP4POL = 1; //fall
ECap1Regs.ECCTL1.bit.CTRRST1 = 1; // 1:delta 0:abs
ECap1Regs.ECCTL1.bit.CTRRST2 = 1; // 1:delta 0:abs
ECap1Regs.ECCTL1.bit.CTRRST3 = 1; // 1:delta 0:abs
ECap1Regs.ECCTL1.bit.CTRRST4 = 1; // 1:delta 0:abs
ECap1Regs.ECCTL1.bit.CAPLDEN = 1; // Enable capture units
ECap1Regs.ECCTL1.bit.PRESCALE = 0; // /1
ECap1Regs.ECCTL2.bit.CAP_APWM = 0; //capture mode
ECap1Regs.ECCTL2.bit.CONT_ONESHT = 0; //continuous mode
ECap1Regs.ECCTL2.bit.SYNCO_SEL =2; //disable syn output
ECap1Regs.ECCTL2.bit.SYNCI_EN = 0; //disable syn input
ECap1Regs.ECEINT.all = 0x0000;
ECap1Regs.ECCLR.all = 0xFFFF;
ECap1Regs.ECCTL2.bit.TSCTRSTOP = 1; // Start Counter
ECap1Regs.ECEINT.bit.CEVT4 = 1; // 4 events = __interrupt
ECap2Regs.ECCTL1.bit.CAP1POL = 0; //rising
ECap2Regs.ECCTL1.bit.CAP2POL = 1; //fall
ECap2Regs.ECCTL1.bit.CAP3POL = 0; //rising
ECap2Regs.ECCTL1.bit.CAP4POL = 1; //fall
ECap2Regs.ECCTL1.bit.CTRRST1 = 1; // 1:delta 0:abs
ECap2Regs.ECCTL1.bit.CTRRST2 = 1; // 1:delta 0:abs
ECap2Regs.ECCTL1.bit.CTRRST3 = 1; // 1:delta 0:abs
ECap2Regs.ECCTL1.bit.CTRRST4 = 1; // 1:delta 0:abs
ECap2Regs.ECCTL1.bit.CAPLDEN = 1; // Enable capture units
ECap2Regs.ECCTL1.bit.PRESCALE = 0; // /1
ECap2Regs.ECCTL2.bit.CAP_APWM = 0; //capture mode
ECap2Regs.ECCTL2.bit.CONT_ONESHT = 0; //continuous mode
ECap2Regs.ECCTL2.bit.SYNCO_SEL =2; //disable syn output
ECap2Regs.ECCTL2.bit.SYNCI_EN = 0; //disable syn input
ECap2Regs.ECEINT.all = 0x0000;
ECap2Regs.ECCLR.all = 0xFFFF;
ECap2Regs.ECCTL2.bit.TSCTRSTOP = 1; // Start Counter
ECap2Regs.ECEINT.bit.CEVT4 = 1; // 4 events = __interrupt
Will the tip pulse on the signal be captured by the ECAP as a rising or falling edge?
Hi,
Robot Jarvis said:Will the tip pulse on the signal be captured by the ECAP as a rising or falling edge?
As I said earlier, tip of the pulse does not matter. ECAP will detect transition when signal changes state from 0 to 1 or 1 to 0 depending on the configuration.
So, the voltage level of the input signal when it transitions from 0 to 1 or 1 to 0 is then the edge is detected.
You can consider to be roughly half of input voltage (3.3v). For accurate specs, refer Vih/Vil parameters in the data sheet.
Nothing happens at the peaks you've indicated in the diagram - for the operation of eCAP they have no effect.