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Compiler/TMS320F28377D: CLA compiler behavior casue program fault

Part Number: TMS320F28377D

Tool/software: TI C/C++ Compiler

Hi expert,

My customer meet with a CLA compiler behavior issue in their near production project. Variable assignment in CLA get delayed with instructions generated by compiler which causes wrong data in the program.
Device: TMS320F28377D
Compiler: TI v18.12.1.LTS

We have tried to debug this with below method:
1. Define data structure and array cla_sInvCurrCtrlPR3 and cla_af32Db[5]. Initiate them as below:
cla_sInvCurrCtrlPR3.f32BefPreResCtrl = 1.0f;
cla_sInvCurrCtrlPR3.f32PreResCtrl = 2.0f;
cla_sInvCurrCtrlPR3.f32ResCtrl = 3.0f;
cla_sInvCurrCtrlPR3.f32A1 = 2.0f;
cla_af32Db[4] = 2.0f;

2. Using CCS to find structure and array address as below:

3. They implemented below calculation:
cla_sInvCurrCtrlPR3.f32BefPreResCtrl = cla_sInvCurrCtrlPR3.f32PreResCtrl;
cla_sInvCurrCtrlPR3.f32PreResCtrl = cla_sInvCurrCtrlPR3.f32ResCtrl;
cla_af32Db[0] = cla_sInvCurrCtrlPR3.f32A1 * cla_sInvCurrCtrlPR3.f32PreResCtrl;

4. They have tried three pieces of code to do the same thing but get different behavior.
A. (Wrong result) cla_sInvCurrCtrlPR3.f32ResCtrl and cla_sInvCurrCtrlPR3.f32PreResCtrl are in adjecent address,Compiler generated instruction MMOVD32 here
B. (Right result) replace cla_sInvCurrCtrlPR3.f32PreResCtrl with cla_af32Db[4] to make memery address none adjacent, Compiler generated instruction MMOV32 and inserted MNOP here.
C. (Right result) Similar to "B", adding __mnop() in "A" to force MNOP here.

5. We assume instruction "MMOVD32 MR0, @0xa0f0" may need some time for @0xa0f2 to be updated, or @0xa0f2 will keep the old value to get the wrong result.

Questions here. Why some cases get MNOP but some not? How do we make sure other part of code is reliable with this compiler?

Example code:
1. cla_af32Db[0] = 4.0: wrong

2. cla_af32Db[1] = 6.0;right

3. cla_af32Db[2] = 6.0;right

Thanks

Sheldon