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TMS320F28379D: TMS320F28379D

shrikant lokhande
Prodigy 40 points

Part Number: TMS320F28379D

Hello all, 

I have developed a TMS320F28379D based board and XDS100V2 probe is also inbuilt on the board itself. Few boards with this configuration are working fine. 

I think I have mistakenly programmed both CPU1 and CPU2 simultaneously on one of the boards. After loading the programming in flash or in RAM I get following error after few seconds (The code runs for some time i.e, LED blinks 2 to 3 times before halting)

C28xx_CPU1: GEL Output:
Memory Map Initialization Complete
C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.
C28xx_CPU1: Error: (Error -1135 @ 0x8264D) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 8.2.0.00004)
C28xx_CPU1: Trouble Halting Target CPU: (Error -1044 @ 0x0) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 8.2.0.00004)
C28xx_CPU1: Unable to determine target status after 20 attempts
C28xx_CPU1: Failed to remove the debug state from the target before disconnecting. There may still be breakpoint op-codes embedded in program memory. It is recommended that you reset the emulator before you connect and reload your program before you continue debugging

  

I tried programming only CPU1 but same error is displayed. 

Is there a way of erasing CPU2 memory ? or can anybody tell what is above error and how to solve it. (The Test connection of XDS100V2 is also successful)

Regards

Shrikant Lokhande

  • 0
    TI__Guru** 116081 points

    Hi Shrikant,

    Programming both CPU1 and CPU2 should not cause any issue. It look like there is some noise on board which is impacting JTAG pins or power supply is not stable. I would suggest to Ist check the power supply and make sure it is stable through out the operation.

    Also you can change the BOOTMODE pin settings to WAIT BOOT and then power-up the device and connect to CCS (do not load code) and then try erasing the code from both CPU via CCS Flash plug-in GUI.

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Prodigy 40 points

    Hi Vivek,

    Thanks for the reply. I could not test the board earlier due to lock down in our area last week. 

    I could test it today and found that the 1.2 supply starts misbehaving after sometime (20 to 50 sec). It appears that 1.2V dips to 0.6 volts every 220ms. This does not happen when MCU is not running. I will get back to you once I check what is the issue with power supply. 

    Just for curiosity, Is there a possibility that when both CPUs starts simultaneously the power required by the controller is more and the dip is observed. I am using TLV75712PDBVR to generate 1.2V MCU supply which is capable of sourcing 1A current.

    Regards

    Shrikant Lokhande

  • 0 in reply to shrikant lokhande
    TI__Guru** 116081 points

    Shrikant,

    Yes, there will be some additional current when both CPU start running but it will be still under the max current spec of the device so as long as that spec is met it should not be an issue. Let us know what you find after checking the board.

    Regards,

    Vivek Singh 

  • 0 in reply to Vivek Singh
    TI__Guru** 116081 points

    Hi Shrikant,

    Were you able to find any issue with board ? If issue is resolved, please mark this post resolved.

    Regards,

    Vivek Singh