Other Parts Discussed in Thread: C2000WARE
I have a question regarding PWM vs CAN interrupt priority in TMS320F28335. My PWM interrupt is set on INT3.1 and CAN interrupt is set on INT9.7. The technical reference manual for the device states that "The CPU fixes interrupt priority for INT1 to INT12. The PIE controls priority for each group of eight interrupts" (pg 148 section 1.6.3.4 of SPRUI07). So according to the manual, INT3.1 should have a higher priority than INT9.7 and therefore the CAN Isr should get interrupted by the PWM Isr (on an interrupt event). However, I am not observing this. At this point, I am not sure how consistent the above observation is. Both Isr were instrumented on GPIOs and duration monitored on a scope
I am using 6 EPWM channels for a motor controller application and setting the interrupt on EPWM1 using the code
PieCtrlRegs.PIEIER3.bit.INTx1 = 1
For CAN, the code is
PieCtrlRegs.PIEIER9.bit.INTx7 = 1
Any insight in to this behavior will be highly appreciated.
