TMS320F28388D: F288388D with 12.5MHz external clock

PAk

Part Number: TMS320F28388D

Hello.

We have designed our custom board implementing a 12.5MHz external oscillator clock (not crystal). We are facing some issues configuring the clocktree (we think because of DCC system).

We are using this setup:

 InitSysPll(XTAL_OSC_SE, SYS_IMULT, SYS_REFDIV, SYS_ODIV, SYS_DIV, SYSCTL_DCC_BASE0);

with 

//12.5MHz
#define SYS_IMULT IMULT_32
#define SYS_REFDIV REFDIV_1
#define SYS_ODIV ODIV_1
#define SYS_DIV PLLCLK_BY_2

We are having doubts with the IsPLLValid and VerifyXTAL(OSC_FREQ) calls.

On the other hand, we have used a F28379D with the same setup on the same board, with no issues using the old:

InitSysPll(XTAL_OSC,IMULT_32,FMULT_0,PLLCLK_BY_2);

How should we write our InitSysCtrl function?

Thank you

over 5 years ago

0 Vivek Singh over 5 years ago

TI__Guru** 115271 points

Hi,

DCC is new module on F2838x device. It was not preset on F2837x device. Can you provide more detail on the issue you are facing ? If you are getting run time error, please attach the snapshot of the error.

Regards,

Vivek Singh

0 PAk over 5 years ago in reply to Vivek Singh

Mastermind 7015 points

The device is frozen at runtime. Probably because the clock tree setup.

Will get the JTAG and get back to you soon. Meanwhile, would you mind to take a look to the InitSysCtrl function of your examples? It is totallyfocused on your controlcard at 25Mhz and 20MHz clock, so probably you would need to make some changes for implementing a generic setup.

Thank you

0 Veena Kamath over 5 years ago in reply to PAk

TI__Mastermind 32565 points

Hi,

I see you have updated the PLL multipliers and dividers correctly.

Have you updated the macro OSC_FREQ?

The function uses this macro as parameter to the verifyXTAL function. The function expects the freq in MHz and is of type uint32_t. Since the osc freq you are using is 12.5, it might have got trimmed to 12. Can you update the function to use float parameter instead.

bool VerifyXTAL(float freq)

I will raise a ticket to get this fixed in the next release.

Regards,

Veena

0 PAk over 5 years ago in reply to Veena Kamath

Mastermind 7015 points

Thank you Veena for your help.

That's what I thought, that there was an error on the library, I am glad for cheking it and confirming it.

On the other hand, does any of the following parametres need to be checked? From my understanding, since we are using a PLL multiplier = 32, then the CPU_RATE should be 6.25 (for a 200MHz clock), right?

//
// The following are values that can be passed to the
// IsPLLValid() to select DCC for PLL validation
//
#define SYSCTL_DCC_BASE0 0
#define SYSCTL_DCC_BASE1 1
#define SYSCTL_DCC_BASE2 2

//
// Specify the clock rate of the CPU (SYSCLKOUT) in nS.
//
// Take into account the input clock frequency and the PLL multiplier
// selected in step 1.
//
// Use one of the values provided, or define your own.
// The trailing L is required tells the compiler to treat
// the number as a 64-bit value.
//
// Only one statement should be uncommented.
//
// Example: 200 MHz devices:
// CLKIN is a 10 MHz crystal or internal 10 MHz oscillator
//
// In step 1 the user specified the PLL multiplier = 40 for a
// 200 MHz CPU clock (SYSCLKOUT = 200 MHz).
//
// In this case, the CPU_RATE will be 5.000L
// Uncomment the line: #define CPU_RATE 5.000L
//

#define CPU_RATE 5.00L // for a 200MHz CPU clock speed (SYSCLKOUT)
//#define CPU_RATE 5.263L // for a 190MHz CPU clock speed (SYSCLKOUT)
//#define CPU_RATE 5.556L // for a 180MHz CPU clock speed (SYSCLKOUT)
//#define CPU_RATE 5.882L // for a 170MHz CPU clock speed (SYSCLKOUT)
//#define CPU_RATE 6.250L // for a 160MHz CPU clock speed (SYSCLKOUT)
//#define CPU_RATE 6.667L // for a 150MHz CPU clock speed (SYSCLKOUT)
//#define CPU_RATE 7.143L // for a 140MHz CPU clock speed (SYSCLKOUT)
//#define CPU_RATE 7.692L // for a 130MHz CPU clock speed (SYSCLKOUT)
//#define CPU_RATE 8.333L // for a 120MHz CPU clock speed (SYSCLKOUT)

We understand too, that we need to select:

#define   XTAL_OSC_SE    5  // External oscillator, single-ended mode

Best regards

0 PAk over 5 years ago in reply to PAk

Mastermind 7015 points

Hello. Is there any answer from TI?

0 Veena Kamath over 5 years ago in reply to PAk

TI__Mastermind 32565 points

Hi,

I think you need to use CPU_RATE as 5.0 since the final CPU clock is running at 200MHz. If you are changing the CPU clock to a lesser frequency, you can select the macro as needed.

Regards,

Veena

0 Veena Kamath over 5 years ago in reply to Veena Kamath

TI__Mastermind 32565 points

Hi,

Did the function work as expected after making the change (uint32_t -> float) ?

Regards,

Veena

0 PAk over 5 years ago in reply to Veena Kamath

Mastermind 7015 points

Veena Kamath said:

Hi,

I think you need to use CPU_RATE as 5.0 since the final CPU clock is running at 200MHz. If you are changing the CPU clock to a lesser frequency, you can select the macro as needed.

What about the PLL MULT? I am using 32.

Veena Kamath said:

Did the function work as expected after making the change (uint32_t -> float) ?

No, it loads with JTAG but it doesn't boot from flash as standalone. Please, check:

https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/924192/3414901#3414901

Best regards

0 Nirav Ginwala over 5 years ago in reply to PAk

TI__Genius 15385 points

Hi,

Are you still having this issue? If not please close this thread.

Thanks,

Nirav

0 PAk over 5 years ago in reply to Nirav Ginwala

Mastermind 7015 points

Yes but it was the Watchdog on the F28388D

0 Veena Kamath over 5 years ago in reply to PAk

TI__Mastermind 32565 points

If the issue mentioned in this thread is resolved, can we close this? We can continue on the other thread,

Regards,

Veena

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TMS320F28388D: F288388D with 12.5MHz external clock