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TMS320F28075: The PSWDLOCK bit of DCSM cannot write a value

Genius 3095 points

Part Number: TMS320F28075

Dear team:

MCU: F28075

CCS:CCS:8.3.0

The PSWDLOCK bit of the DCSM of f28075 cannot be written to the value. The details are as follows:

1, The .cmd file:

MEMORY
{
PAGE 0 : /* Program Memory */

/* Z1 OTP. LinkPointers */
DCSM_OTP_Z1_LINKPOINTER : origin = 0x78000, length = 0x00000C
/* Z1 OTP. PSWDLOCK/RESERVED */
DCSM_OTP_Z1_PSWDLOCK : origin = 0x78010, length = 0x000004
/* Z1 OTP. CRCLOCK/RESERVED */
DCSM_OTP_Z1_CRCLOCK : origin = 0x78014, length = 0x000004
/* Z1 OTP. RESERVED/BOOTCTRL */
DCSM_OTP_Z1_BOOTCTRL : origin = 0x7801C, length = 0x000004

/* DCSM Z1 Zone Select Contents (!!Movable!!) */
/* Z1 OTP. Z1 password locations / Flash and RAM partitioning */
DCSM_ZSEL_Z1_P0 : origin = 0x78050, length = 0x000010

/* Z2 OTP. LinkPointers */
DCSM_OTP_Z2_LINKPOINTER : origin = 0x78200, length = 0x00000C
/* Z2 OTP. GPREG1/GPREG2 */
DCSM_OTP_Z2_GPREG : origin = 0x7820C, length = 0x000004
/* Z2 OTP. PSWDLOCK/RESERVED */
DCSM_OTP_Z2_PSWDLOCK : origin = 0x78210, length = 0x000004
/* Z2 OTP. CRCLOCK/RESERVED */
DCSM_OTP_Z2_CRCLOCK : origin = 0x78214, length = 0x000004
/* Z2 OTP. GPREG3/BOOTCTRL */
DCSM_OTP_Z2_BOOTCTRL : origin = 0x7821C, length = 0x000004

/* DCSM Z1 Zone Select Contents (!!Movable!!) */
/* Z2 OTP. Z2 password locations / Flash and RAM partitioning */
DCSM_ZSEL_Z2_P0 : origin = 0x78220, length = 0x000010

}

SECTIONS
{
dcsm_otp_z1_linkpointer : > DCSM_OTP_Z1_LINKPOINTER PAGE = 0/*, type = DSECT*/
dcsm_otp_z1_pswdlock : > DCSM_OTP_Z1_PSWDLOCK PAGE = 0/*, type = DSECT*/
dcsm_otp_z1_crclock : > DCSM_OTP_Z1_CRCLOCK PAGE = 0/*, type = DSECT*/
dcsm_otp_z1_bootctrl : > DCSM_OTP_Z1_BOOTCTRL PAGE = 0/*, type = DSECT*/
dcsm_zsel_z1 : > DCSM_ZSEL_Z1_P0 PAGE = 0/*, type = DSECT*/

dcsm_otp_z2_linkpointer : > DCSM_OTP_Z2_LINKPOINTER PAGE = 0, type = DSECT
dcsm_otp_z2_pswdlock : > DCSM_OTP_Z2_PSWDLOCK PAGE = 0, type = DSECT
dcsm_otp_z2_crclock : > DCSM_OTP_Z2_CRCLOCK PAGE = 0, type = DSECT
dcsm_otp_z2_bootctrl : > DCSM_OTP_Z2_BOOTCTRL PAGE = 0, type = DSECT
dcsm_zsel_z2 : > DCSM_ZSEL_Z2_P0 PAGE = 0, type = DSECT
}

2, DCSM file:

.sect "dcsm_otp_z1_linkpointer"
.long 0x1FFFFFF8 ;Z1-LINKPOINTER1
.long 0xFFFFFFFF ;Reserved
.long 0x1FFFFFF8 ;Z1-LINKPOINTER2
.long 0xFFFFFFFF ;Reserved
.long 0x1FFFFFF8 ;Z1-LINKPOINTER3
.long 0xFFFFFFFF ;Reserved

.sect "dcsm_otp_z1_pswdlock"
.long 0xFFFFFFFE ;Z1-PSWDLOCK
.long 0xFFFFFFFF ;Reserved

.sect "dcsm_otp_z1_crclock"
.long 0xFFFFFFFF ;Z1-CRCLOCK
.long 0xFFFFFFFF ;Reserved

.sect "dcsm_otp_z1_bootctrl"
.long 0xFFFFFFFF ;Reserved
.long 0xFFFFFFFF ;Z1-BOOTCTRL

.sect "dcsm_zsel_z1"

.long 0xFFFFFFFF ;Z1-EXEONLYRAM
.long 0xFFFFFFFF ;Z1-EXEONLYSECT
.long 0xDFFF5555 ;Z1-GRABRAM
.long 0xF5555555 ;Z1-GRABSECT

.long 0xFFFFA5A5 ;Z1-CSMPSWD0 (LSW of 128-bit password)
.long 0xFFFF5A5A ;Z1-CSMPSWD1
.long 0xFFFFA5A5 ;Z1-CSMPSWD2
.long 0xFFFF5A5A ;Z1-CSMPSWD3 (MSW of 128-bit password)

3. Compile it into a.cmd file and debug it. CCS prompts the following faults:

C28xx_CPU1: Error during Flash programming (Flash algorithm returned error code). FMSTAT value = 0. Operation Cancelled (0).
C28xx_CPU1: File Loader: Memory write failed: Unknown error
C28xx_CPU1: GEL: File: D:\v210\F2807x_examples_Cpu1\timed_led_blink\cpu01\ccs\CPU1_RAM\timed_led_blink_cpu01.out: Load failed.

4. Content of DCSM OTP (0x78000)

1FFFFFF8 FFFFFFFF 1FFFFFF8 FFFFFFFF 1FFFFFF8 FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFF1 FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF

My question is "can't the new chip write PSWDLOCK bit after writing LINKPOINTER and CSMPSWD bits?"

Best regards

  • Hi,

    Have you programmed this earlier even once with default value of 0xFFFF_FFFF in password lock ? If yes then it may have programmed the ECC value and since it is OTP, it'll not be able to change the ECC value when you try to program new value for PSWDLOCK.

    Regards,

    Vivek Singh

  • Dear Vivek:

    Thank you for your reply, But if it's programming new chips, will there be such problems?

    In addition, is there any relationship between PSWDLOCK bit, LINKPOINTER bit and CSMPSWD bit?

    Best regards

  • Hi,

    Thank you for your reply, But if it's programming new chips, will there be such problems?

    No, on device which has not been programmed even once should not have this issue.

    In addition, is there any relationship between PSWDLOCK bit, LINKPOINTER bit and CSMPSWD bit?

    PSWDLOCK field decides the visibility of CSMPSWD field in USEROTP. Detail is provided DCSM section of device TRM.

    Regards,

    Vivek Singh