Part Number: LAUNCHXL-F28379D
Tool/software: Code Composer Studio
Hello all,
I write the code that sends data from SPI_A(master) to SPI_B(slave). According to datasheet the SPISTE pin in master before the start of transmission asserted to 0(low) by master and in end of transmission asserted to 1 (high) by master. In the slave (SPI_B) for receive data the SPISTE pin should asserted to 0 (low). Now I have a question. I asserted SPISTE in slave (SPI_B) to 0 ( I connected this pin to GND of board) and in end of transmission keep this pin to 0 (low) and then sends next data. But the result is incorrect.
and now my question :
Is necessary that the end of transmission of word the SPISTE pin in slave asserted to 1 (high) ?
My code :
/**
* main.c
*/
#include "F28x_Project.h"
void spia_config_transmitter (void);
void spia_config_gpio (void);
void spib_config_receiver (void);
void spib_config_gpio (void);
__interrupt void isr_spia_transmitter(void);
__interrupt void isr_spib_receiver(void);
int main(void)
{
InitSysCtrl();
DINT;
IER = 0x0000;
IFR = 0x0000;
InitPieCtrl();
InitPieVectTable();
EALLOW;
PieVectTable.SPIA_RX_INT = &isr_spia_transmitter;
PieVectTable.SPIB_RX_INT = &isr_spib_receiver;
EDIS;
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
PieCtrlRegs.PIEIER6.bit.INTx1 = 1;
PieCtrlRegs.PIEIER6.bit.INTx3 = 1;
IER = M_INT6;
EINT;
spia_config_gpio();
spib_config_gpio();
spib_config_receiver();
spia_config_transmitter();
SpiaRegs.SPITXBUF = 0;
SpibRegs.SPITXBUF = 0;
for(;;);
}
void spia_config_transmitter (void)
{
SpiaRegs.SPICCR.bit.SPISWRESET = 0; // reset SPI for change configuration
SpiaRegs.SPICTL.bit.MASTER_SLAVE = 1; // setup SPI in master mode
SpiaRegs.SPICTL.bit.CLK_PHASE = 1; // transmits data in rising edge and receive data in falling edge of SPICLK
SpiaRegs.SPICCR.bit.CLKPOLARITY = 1;
SpiaRegs.SPIBRR.bit.SPI_BIT_RATE = 1; // for SPIBRR = 0,1,2 ---> Baud Rate = LSPCLK/4
// for SPIBRR = 3 to 127 ---> Baud Rate = LSPCLK/(SPIBRR+1)
SpiaRegs.SPICCR.bit.SPICHAR = 15;// SPICHAR = Word length - 1
SpiaRegs.SPIFFTX.bit.SPIFFENA = 0; // disable FIFO
SpiaRegs.SPICTL.bit.TALK = 1;
SpiaRegs.SPICTL.bit.SPIINTENA = 1;
SpiaRegs.SPICCR.bit.SPILBK = 0;
SpiaRegs.SPICCR.bit.SPISWRESET = 1; // saving changing of configuration
}
void spia_config_gpio (void)
{
EALLOW;
GpioCtrlRegs.GPBGMUX2.bit.GPIO58 = 3;
GpioCtrlRegs.GPBGMUX2.bit.GPIO59 = 3;
GpioCtrlRegs.GPBGMUX2.bit.GPIO60 = 3;
GpioCtrlRegs.GPBGMUX2.bit.GPIO61 = 3;
GpioCtrlRegs.GPBMUX2.bit.GPIO58 = 3;
GpioCtrlRegs.GPBMUX2.bit.GPIO59 = 3;
GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 3;
GpioCtrlRegs.GPBMUX2.bit.GPIO61 = 3;
GpioCtrlRegs.GPBQSEL2.bit.GPIO58 = 3;
GpioCtrlRegs.GPBQSEL2.bit.GPIO59 = 3;
GpioCtrlRegs.GPBQSEL2.bit.GPIO60 = 3;
GpioCtrlRegs.GPBQSEL2.bit.GPIO61 = 3;
GpioCtrlRegs.GPBPUD.bit.GPIO58 = 0;
GpioCtrlRegs.GPBPUD.bit.GPIO59 = 0;
GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0;
GpioCtrlRegs.GPBPUD.bit.GPIO61 = 0;
EDIS;
}
void spib_config_receiver (void)
{
SpibRegs.SPICCR.bit.SPISWRESET = 0; // reset SPI for change configuration
SpibRegs.SPICTL.bit.MASTER_SLAVE = 0; // setup SPI in slave mode
SpibRegs.SPICTL.bit.CLK_PHASE = 1; // transmits data in rising edge and receive data in falling edge of SPICLK
SpibRegs.SPICCR.bit.CLKPOLARITY = 1;
SpibRegs.SPIBRR.bit.SPI_BIT_RATE = 1; // for SPIBRR = 0,1,2 ---> Baud Rate = LSPCLK/4
// for SPIBRR = 3 to 127 ---> Baud Rate = LSPCLK/(SPIBRR+1)
SpibRegs.SPICCR.bit.SPICHAR = 15;// SPICHAR = Word length - 1
SpibRegs.SPIFFTX.bit.SPIFFENA = 0; // disable FIFO
SpibRegs.SPICTL.bit.TALK = 1;
SpibRegs.SPICTL.bit.SPIINTENA = 1;
SpibRegs.SPICTL.bit.OVERRUNINTENA = 1;
SpibRegs.SPICCR.bit.SPISWRESET = 1; // saving changing of configuration
}
void spib_config_gpio (void)
{
EALLOW;
GpioCtrlRegs.GPAGMUX2.bit.GPIO24 = 1;
GpioCtrlRegs.GPAGMUX2.bit.GPIO25 = 1;
GpioCtrlRegs.GPAGMUX2.bit.GPIO26 = 1;
GpioCtrlRegs.GPAGMUX2.bit.GPIO27 = 1;
GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 2;
GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 2;
GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 2;
GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 2;
GpioCtrlRegs.GPAQSEL2.bit.GPIO24 = 3;
GpioCtrlRegs.GPAQSEL2.bit.GPIO25 = 3;
GpioCtrlRegs.GPAQSEL2.bit.GPIO26 = 3;
GpioCtrlRegs.GPAQSEL2.bit.GPIO27 = 3;
GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0;
GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0;
GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0;
GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0;
EDIS;
}
__interrupt void isr_spia_transmitter(void)
{
static int i = 0;
static int dummy_data[500];
dummy_data[i++] = SpiaRegs.SPIRXBUF;
SpibRegs.SPITXBUF = 500-i;
SpiaRegs.SPITXBUF = i;
//ESTOP0;
if (i == 250)
{
SpiaRegs.SPICTL.bit.SPIINTENA = 0;
}
PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
}
__interrupt void isr_spib_receiver(void)
{
static int j=0;
static int rdata[500];
rdata[j++] = SpibRegs.SPIRXBUF;
if(j == 500)
{
asm(" ESTOP0");
}
PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
}
the result of received data when the SPISTE in slave (GPIO27) connected to SPISTE in master(GPIO61)
the result of received data when the SPISTE in slave (GPIO27) connected to GND :
Thank you.