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CCS/TMS320F28379D: Keep the ISR interrupt running when paused in debugging mode.

Part Number: TMS320F28379D

Tool/software: Code Composer Studio

Hello,

I am working on a grid-tied inverter project and I need to run the DSP in debug mode to keep track of the variables and the program flow. However I am nervous that I might accidentally pause the DSP or  the code hits a break point at which point the duty cycles will not update and the inverter might fail catastrophically. Is there a way to view the code variables in real-time in debug mode while making sure the DSP processor isn't accidentally stopped while gating? What are the 'debugging' best practices for high-power applications?

Thanks

  • Hi ,

    Are you referring to the TIDA-01606 reference design?

    It's always good practice to make sure the OCP / OVP protection options are enabled in the software when using the design in a powered state. These protections will disable the PWM signals if an over current, or over voltage event is detected. Regarding accidentally pausing the execution, or hitting a break point, it is good to make sure that the TZ6 event is enabled. This will generate a trip event to the EPWMs and force the signals to a safe state when an emulation stop happens. Some examples include this, but but this coverage may be missing in others.

    You can use the EPWM_enableTripZoneSignals() function to explicitly enable the TZ6 signal for the emulator stop. For example:

    //
    // Enable the Emulator Stop trip event for EPWM1
    // TZ6 dedicated for emulator stops (select CPU1 / CPU2 by mux)
    //
    EPWM_enableTripZoneSignals(EPWM1_BASE, EPWM_TZ_SIGNAL_OSHT6);
    

    Best,

    Clayton