TMS320F28069F: SPI Clock Setting with Slave Devices

Hi Hao,

Thank you for posting your question.

Hao Qin said:

Can I set up a SPI clock to 11.25 MHz with 3 SPI clk delay to work with this slow slave sensor? Or must I set lower SPI clock to 5.625 MHz to work with this 10 MHz sensor. If I set some SPI clock delay, the enable windows still is the same. Does adding delay help to work with slow SPI slave device?

You should be able to set up the clock to 11.25MHz with some SPI clk delay in order to work with your slow slave sensor. The reason behind the delay is to have better synchronization between the master and slave during scenarios like this.

What I would recommend is using the PLL to alter the SYSCLKOUT out from 90MHz to 80MHz. Refer to Table 1-24. PLL Settings in the TMS320x2806x Piccolo Technical Reference Manual for more information on how to do this.

By doing this you can achieve a LSPCLK of 40MHz (SYSCLKOUT/2) which enables you to have a SPI CLK of 10MHz (LSPCLK/4). Therefore, you wouldn't need to figure out the delay and you'd have a frequency match between your master and slave device.

Hao Qin said:

But I confuse adding delay will not enlarge the sample window if I don't reduce the SPI clock frequency. Thanks for your information.

The delay is in terms of SPICLK cycles. Therefore, running at a higher frequency would mean you will have a larger amount of cycle delays between your word transmissions rather than operating at a slower frequency.

Best Regards,

Marlyn

Hi Marlyn,

If I set it to 3 clk delay in this case, does it mean SPI master (28069) use 19 (3+16) clk to transmit 16 bit data from slow SPI slave device? The actual SPI frequency is 16*11.25/19=9.474MHz less and closed to10 MHz. Am I correct? So do I set FIFO control register SPIFFCT to 4? Thanks.

Hao