Tool/software: Code Composer Studio
《TMS320F28335 development board communication failure through SPI》
The master and slave computers can not receive data normally,Help solve the problem
Master code:
#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
__interrupt void spiTxFifoIsr(void);
__interrupt void spiRxFifoIsr(void);
void delay_loop(void);
void spi_fifo_init(void);
void error();
Uint16 sdata[8];
Uint16 rdata[8];
//Uint16 t1=11;
//Uint16 t2;
Uint16 rdata_point; // Keep track of where we are in the data stream to check received data
void main(void)
{
Uint16 i;
// Step 1. Initialize System Control:
InitSysCtrl();
// Step 2. Initialize GPIO:
InitSpiaGpio();
// Step 3. Initialize PIE vector table:
// Disable and clear all CPU interrupts
DINT;
IER = 0x0000;
IFR = 0x0000;
// Initialize PIE control registers to their default state:
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.SPITXINTA = &spiTxFifoIsr;
PieVectTable.SPIRXINTA = &spiRxFifoIsr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2833x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
spi_fifo_init(); // Initialize the SPI only
// Step 5. User specific code, enable interrupts:
// Initialize the send data buffer
for(i=0; i<8; i++)
{
sdata[i] =i;
}
// sdata[1] =t1;
// sdata[2] =t2;
rdata_point = 0;
// Enable interrupts required for this example
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER6.bit.INTx1=1; // Enable PIE Group 6, INT 1
PieCtrlRegs.PIEIER6.bit.INTx2=1; // Enable PIE Group 6, INT 2
IER=0x20; // Enable CPU INT6
EINT; // Enable Global Interrupts
// Step 6. IDLE loop. Just sit and loop forever (optional):
for(;;)
{
;
}
}
// Some Useful local functions
void delay_loop()
{
long i;
for (i = 0; i < 1000000; i++) {}
}
void error(void)
{
__asm(" ESTOP0"); //Test failed!! Stop!
for (;;);
}
void spi_fifo_init()
{
EALLOW;
// Initialize SPI FIFO registers
SpiaRegs.SPICCR.bit.SPISWRESET=0; // Reset SPI
SpiaRegs.SPICCR.all=0x00F; //16-bit character, disable Loopback mode,上升沿发数据
SpiaRegs.SPICTL.all=0x0017; //Interrupt enabled, Master/Slave XMIT enabled,mater mode
SpiaRegs.SPISTS.all=0x0000;
// SpiaRegs.SPIBRR=0x0063; // Baud rate
SpiaRegs.SPIBRR=49;
SpiaRegs.SPIFFTX.all=0xC028; // Enable FIFO's, set TX FIFO level to 8
//SpiaRegs.SPIFFRX.all=0x0028; // Set RX FIFO level to 8
SpiaRegs.SPIFFRX.all=0x008; // Set RX FIFO level to 8,disable RX FIFO
SpiaRegs.SPIFFCT.all=0x00;
SpiaRegs.SPIPRI.all=0x0010;
SpiaRegs.SPICCR.bit.SPISWRESET=1; // Enable SPI
SpiaRegs.SPIFFTX.bit.TXFIFO=1;
SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;
EDIS;
}
__interrupt void spiTxFifoIsr(void)
{
Uint16 ii;
for(ii=0;ii<8;ii++)
{
SpiaRegs.SPITXBUF=sdata[ii];
}
for(ii=0;ii<8;ii++)
{
sdata[ii]=sdata[ii];
// sdata[i]=sdata[i]+1;
}
SpiaRegs.SPIFFRX.bit.RXFFIENA=1; //ENABLE RX FIFO
SpiaRegs.SPIFFTX.bit.TXFFIENA=0; //DISABLE TX FIFO
SpiaRegs.SPIFFTX.bit.TXFFINTCLR=1; // Clear Interrupt flag
PieCtrlRegs.PIEACK.all|=0x20; // Issue PIE ack
}
__interrupt void spiRxFifoIsr(void)
{
Uint16 iii;
for(iii=0;iii<8;iii++)
{
rdata[iii]=SpiaRegs.SPIRXBUF; // read data
}
SpiaRegs.SPIFFRX.bit.RXFFIENA=0; //DISABLE RX FIFO
SpiaRegs.SPIFFTX.bit.TXFFIENA=1;
SpiaRegs.SPIFFRX.bit.RXFFOVFCLR=1; // Clear Overflow flag
SpiaRegs.SPIFFRX.bit.RXFFINTCLR=1; // Clear Interrupt flag
PieCtrlRegs.PIEACK.all|=0x20; // Issue PIE ack
}
Slave code:
#include "DSP28x_Project.h"
__interrupt void spiTxFifoIsr(void);
__interrupt void spiRxFifoIsr(void);
void delay_loop(void);
void spi_fifo_init(void);
void error();
Uint16 sdata[8];
Uint16 rdata[8];
Uint16 rdata_point; // Keep track of where we are
void main(void)
{
Uint16 i;
// Step 1. Initialize System Control:
InitSysCtrl();
// Step 2. Initialize GPIO:
InitSpiaGpio(); //Gpio
// Step 3. Initialize PIE vector table:
// Disable and clear all CPU interrupts
DINT;
IER = 0x0000;
IFR = 0x0000;
// Initialize PIE control registers to their default state:
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();
InitPieVectTable();
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.SPITXINTA = &spiTxFifoIsr;
PieVectTable.SPIRXINTA = &spiRxFifoIsr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2833x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
spi_fifo_init(); // Initialize the SPI only
// Step 5. User specific code, enable interrupts:
// Initialize the send data buffer
for(i=0; i<8; i++)
{
// sdata[i] =i;
sdata[i] =6;
}
rdata_point = 0;
// Enable interrupts required for this example
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER6.bit.INTx1=1; // Enable PIE Group 6, INT 1
PieCtrlRegs.PIEIER6.bit.INTx2=1; // Enable PIE Group 6, INT 2
IER=0x20; // Enable CPU INT6
EINT; // Enable Global Interrupts
// Step 6. IDLE loop. Just sit and loop forever (optional):
for(;;)
{
;
}
}
void error(void)
{
__asm(" ESTOP0"); //Test failed!! Stop!
for (;;);
}
void spi_fifo_init()
{
EALLOW;
// Initialize SPI FIFO registers
SpiaRegs.SPICCR.bit.SPISWRESET=0; // Reset SPI
SpiaRegs.SPICCR.all=0x00F; //16-bit character, disable Loopback mode,ÉÏÉıÑØ·¢Êı¾İ
SpiaRegs.SPICTL.all=0x0013;
// SpiaRegs.SPICTL.bit.CLK_PHASE=1;
SpiaRegs.SPISTS.all=0x0000;
SpiaRegs.SPIFFTX.all=0xC008; //Enable FIFO's, set TX FIFO level to 8,disable tX FIFO
SpiaRegs.SPIFFRX.all=0x0028; //Set RX FIFO level to 8
SpiaRegs.SPIFFCT.all=0x00;
SpiaRegs.SPIPRI.all=0x0010;
// SpiaRegs.SPICCR.all=0x01F;
SpiaRegs.SPICCR.bit.SPISWRESET=1; // Enable SPI
SpiaRegs.SPIFFTX.bit.TXFIFO=1;
SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;
EDIS;
}
__interrupt void spiTxFifoIsr(void)
{
Uint16 i;
//delay_loop();
for(i=0;i<8;i++)
{
SpiaRegs.SPITXBUF=sdata[i];
}
for(i=0;i<8;i++)
{
sdata[i]=sdata[i];
sdata[i]=sdata[i]++;
}
SpiaRegs.SPIFFRX.bit.RXFFIENA=1; //ENABLE RX FIFO
SpiaRegs.SPIFFTX.bit.TXFFIENA=0; //DISABLE TX FIFO
SpiaRegs.SPIFFTX.bit.TXFFINTCLR=1; // Clear Interrupt flag
PieCtrlRegs.PIEACK.all|=0x20; // Issue PIE ack
}
__interrupt void spiRxFifoIsr(void)
{
Uint16 i;
for(i=0;i<8;i++)
{
rdata[i]=SpiaRegs.SPIRXBUF; // read data
}
SpiaRegs.SPIFFRX.bit.RXFFIENA=0; //DISABLE RX FIFO
SpiaRegs.SPIFFTX.bit.TXFFIENA=1; //ENABLE TX FIFO
rdata_point++;
SpiaRegs.SPIFFRX.bit.RXFFOVFCLR=1; // Clear Overflow flag
SpiaRegs.SPIFFRX.bit.RXFFINTCLR=1; // Clear Interrupt flag
PieCtrlRegs.PIEACK.all|=0x20; // Issue PIE ack
}